From 0a15fe929982677bb58f4ae9c4552037f445bddb Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Sat, 17 Sep 2016 19:12:27 +0200 Subject: northbridge/intel/i945: Add space around operators Change-Id: I24505af163544a03e3eab72c24f25fcdc4b1b16c Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/16624 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/northbridge/intel/i945/gma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/northbridge/intel/i945/gma.c') diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index 02caa0a37a..9d8117140f 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -121,7 +121,7 @@ static int intel_gma_init(struct northbridge_intel_i945_config *conf, for (i = 0; i < 2; i++) for (j = 0; j < 0x100; j++) - /* R=j, G=j, B=j. */ + /* R = j, G = j, B = j. */ write32(pmmio + PALETTE(i) + 4 * j, 0x10101 * j); write32(pmmio + PCH_PP_CONTROL, PANEL_UNLOCK_REGS @@ -423,7 +423,7 @@ static void gma_func0_init(struct device *dev) mmiobase = (void *)(uintptr_t)dev->resource_list[0].base; graphics_base = dev->resource_list[2].base; - printk(BIOS_SPEW, "GMADR=0x%08x GTTADR=0x%08x\n", + printk(BIOS_SPEW, "GMADR = 0x%08x GTTADR = 0x%08x\n", pci_read_config32(dev, GMADR), pci_read_config32(dev, GTTADR) ); -- cgit v1.2.3