From 71a3d96bc487f66c84ac869a1215b8a4a4499bf2 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 21 Jul 2009 21:44:24 +0000 Subject: * drop ich7 include * detect more i945 variants * raminit fixes * ACPI + PCIe updates Signed-off-by: Stefan Reinauer Acked-by: Carl-Daniel Hailfinger Acked-by: Peter Stuge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4455 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/intel/i945/acpi.c | 74 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 src/northbridge/intel/i945/acpi.c (limited to 'src/northbridge/intel/i945/acpi.c') diff --git a/src/northbridge/intel/i945/acpi.c b/src/northbridge/intel/i945/acpi.c new file mode 100644 index 0000000000..c5ecdc5700 --- /dev/null +++ b/src/northbridge/intel/i945/acpi.c @@ -0,0 +1,74 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +unsigned long acpi_fill_mcfg(unsigned long current) +{ + device_t dev; + u32 pciexbar = 0; + u32 pciexbar_reg; + int max_buses; + + dev = dev_find_device(0x8086, 0x27a0, 0); + if (!dev) + return current; + + pciexbar_reg=pci_read_config32(dev, 0x48); + + // MMCFG not supported or not enabled. + if (!(pciexbar_reg & (1 << 0))) + return current; + + switch ((pciexbar_reg >> 1) & 3) { + case 0: // 256MB + pciexbar = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)); + max_buses = 256; + break; + case 1: // 128M + pciexbar = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)|(1 << 27)); + max_buses = 128; + break; + case 2: // 64M + pciexbar = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)|(1 << 27)|(1 << 26)); + max_buses = 64; + break; + default: // RSVD + return current; + } + + if (!pciexbar) + return current; + + current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *) current, + pciexbar, 0x0, 0x0, max_buses - 1); + + return current; +} + + -- cgit v1.2.3