From bde6d309dfafe58732ec46314a2d4c08974b62d4 Mon Sep 17 00:00:00 2001 From: Kevin Paul Herbert Date: Wed, 24 Dec 2014 18:43:20 -0800 Subject: x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer On x86, change the type of the address parameter in read8()/read16/read32()/write8()/write16()/write32() to be a pointer, instead of unsigned long. Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330 Signed-off-by: Kevin Paul Herbert Signed-off-by: Alexandru Gagniuc Reviewed-on: http://review.coreboot.org/7784 Tested-by: build bot (Jenkins) --- src/northbridge/intel/i82830/raminit.c | 8 ++++---- src/northbridge/intel/i82830/smihandler.c | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) (limited to 'src/northbridge/intel/i82830') diff --git a/src/northbridge/intel/i82830/raminit.c b/src/northbridge/intel/i82830/raminit.c index a42374c101..bff59bf3a4 100644 --- a/src/northbridge/intel/i82830/raminit.c +++ b/src/northbridge/intel/i82830/raminit.c @@ -77,15 +77,15 @@ static void ram_read32(u8 dimm_start, u32 offset) { u32 reg32, base_addr = 32 * 1024 * 1024 * dimm_start; if (offset == 0x55aa55aa) { - reg32 = read32(base_addr); + reg32 = read32((u32 *)base_addr); PRINTK_DEBUG(" Reading RAM at 0x%08x => 0x%08x\n", base_addr, reg32); PRINTK_DEBUG(" Writing RAM at 0x%08x <= 0x%08x\n", base_addr, offset); - write32(base_addr, offset); - reg32 = read32(base_addr); + write32((u32 *)base_addr, offset); + reg32 = read32((u32 *)base_addr); PRINTK_DEBUG(" Reading RAM at 0x%08x => 0x%08x\n", base_addr, reg32); } else { PRINTK_DEBUG(" to 0x%08x\n", base_addr + offset); - read32(base_addr + offset); + read32((u32 *)(base_addr + offset)); } } diff --git a/src/northbridge/intel/i82830/smihandler.c b/src/northbridge/intel/i82830/smihandler.c index e4d93cfe69..b50c884299 100644 --- a/src/northbridge/intel/i82830/smihandler.c +++ b/src/northbridge/intel/i82830/smihandler.c @@ -297,7 +297,7 @@ static void mbi_call(u8 subf, banner_id_t *banner_id) static void smi_interface_call(void) { - u32 mmio = pci_read_config32(PCI_DEV(0, 0x02, 0), 0x14); + u8 *mmio = (u8 *)pci_read_config32(PCI_DEV(0, 0x02, 0), 0x14); // mmio &= 0xfff80000; // printk(BIOS_DEBUG, "mmio=%x\n", mmio); u16 swsmi = pci_read_config16(PCI_DEV(0, 0x02, 0), 0xe0); -- cgit v1.2.3