From 0f92f630556b4bf2e4c0696cae4c2f8e97eda334 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Sun, 27 Jul 2014 19:37:31 +0200 Subject: Uniformly spell frequency unit symbol as Hz Change-Id: I1eb8d5bd79322ff3654a6ad66278a57d46a818c1 Signed-off-by: Elyes HAOUAS Reviewed-on: http://review.coreboot.org/6384 Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan --- src/northbridge/intel/i3100/raminit.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'src/northbridge/intel/i3100') diff --git a/src/northbridge/intel/i3100/raminit.c b/src/northbridge/intel/i3100/raminit.c index 443972e4d6..4f5a989dc6 100644 --- a/src/northbridge/intel/i3100/raminit.c +++ b/src/northbridge/intel/i3100/raminit.c @@ -433,12 +433,12 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl, } else { drt |= (2<<22); } - /* Docs say use 55 for all 200Mhz */ + /* Docs say use 55 for all 200MHz */ drt |= (0x055<<24); } - else if(value <= 0x60) { /* 167 Mhz */ + else if(value <= 0x60) { /* 167 MHz */ /* according to new documentation CAS latency is 00 - * for bits 3:2 for all 167 Mhz + * for bits 3:2 for all 167 MHz drt |= ((index&3)<<2); */ /* set CAS latency */ if((index&0x0ff00)<=0x03000) { drt |= (1<<8); /* Trp RAS Precharg */ @@ -478,10 +478,10 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl, } else { drt |= (2<<22); } - /* Docs state to use 99 for all 167 Mhz */ + /* Docs state to use 99 for all 167 MHz */ drt |= (0x099<<24); } - else if(value <= 0x75) { /* 133 Mhz */ + else if(value <= 0x75) { /* 133 MHz */ drt |= ((index&3)<<2); /* set CAS latency */ if((index&0x0ff00)<=0x03c00) { drt |= (1<<8); /* Trp RAS Precharg */ -- cgit v1.2.3