From 78ba7a7865ed1f60c7f55bfcced305bc8fbdc9c6 Mon Sep 17 00:00:00 2001 From: Elyes Haouas Date: Mon, 6 May 2024 05:11:28 +0200 Subject: device/dram/ddr{3,4}: Rename spd_raw_data for specific DDR Rename different spd_raw_data[] for DDR3 and DDR4. This is to solve the conflict when we include both "ddr3.h" and ddr4.h" for example here: src/device/dram/spd.c. Otherwise, it won't compile as DDR3 and DDR4 have different spd_raw_data[] size. Change-Id: I46597fe82790410fbb53d60e04b7fdffb7b0094a Signed-off-by: Elyes Haouas Reviewed-on: https://review.coreboot.org/c/coreboot/+/82171 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/northbridge/intel/haswell/native_raminit/raminit_native.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/northbridge/intel/haswell') diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h index 1a0793947e..2a168666ac 100644 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h @@ -33,7 +33,7 @@ enum generic_stepping { }; struct raminit_dimm_info { - spd_raw_data raw_spd; + spd_ddr3_raw_data raw_spd; struct dimm_attr_ddr3_st data; uint8_t spd_addr; bool valid; -- cgit v1.2.3