From 24d1d4b47274eb82893e6726472a991a36fce0aa Mon Sep 17 00:00:00 2001
From: Stefan Reinauer <reinauer@chromium.org>
Date: Thu, 21 Mar 2013 11:51:41 -0700
Subject: x86: Unify arch/io.h and arch/romcc_io.h

Here's the great news: From now on you don't have to worry about
hitting the right io.h include anymore. Just forget about romcc_io.h
and use io.h instead. This cleanup has a number of advantages, like
you don't have to guard device/ includes for SMM and pre RAM
anymore. This allows to get rid of a number of ifdefs and will
generally make the code more readable and understandable.

Potentially in the future some of the code in the io.h __PRE_RAM__
path should move to device.h or other device/ includes instead,
but that's another incremental change.

Change-Id: I356f06110e2e355e9a5b4b08c132591f36fec7d9
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2872
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
---
 src/northbridge/intel/haswell/bootblock.c       | 1 -
 src/northbridge/intel/haswell/early_init.c      | 1 -
 src/northbridge/intel/haswell/finalize.c        | 1 -
 src/northbridge/intel/haswell/raminit.c         | 1 -
 src/northbridge/intel/haswell/report_platform.c | 2 --
 5 files changed, 6 deletions(-)

(limited to 'src/northbridge/intel/haswell')

diff --git a/src/northbridge/intel/haswell/bootblock.c b/src/northbridge/intel/haswell/bootblock.c
index 35f357f57f..743007e157 100644
--- a/src/northbridge/intel/haswell/bootblock.c
+++ b/src/northbridge/intel/haswell/bootblock.c
@@ -1,5 +1,4 @@
 #include <arch/io.h>
-#include <arch/romcc_io.h>
 
 /* Just re-define this instead of including haswell.h. It blows up romcc. */
 #define PCIEXBAR	0x60
diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c
index a94c0ce6f0..5b364189e9 100644
--- a/src/northbridge/intel/haswell/early_init.c
+++ b/src/northbridge/intel/haswell/early_init.c
@@ -22,7 +22,6 @@
 #include <stdlib.h>
 #include <console/console.h>
 #include <arch/io.h>
-#include <arch/romcc_io.h>
 #include <device/pci_def.h>
 #include <elog.h>
 #include "haswell.h"
diff --git a/src/northbridge/intel/haswell/finalize.c b/src/northbridge/intel/haswell/finalize.c
index 58052f9952..457f4af0fb 100644
--- a/src/northbridge/intel/haswell/finalize.c
+++ b/src/northbridge/intel/haswell/finalize.c
@@ -19,7 +19,6 @@
  */
 
 #include <arch/io.h>
-#include <arch/romcc_io.h>
 #include <stdlib.h>
 #include "haswell.h"
 
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c
index 1439200de9..9a9bb1c09f 100644
--- a/src/northbridge/intel/haswell/raminit.c
+++ b/src/northbridge/intel/haswell/raminit.c
@@ -21,7 +21,6 @@
 #include <string.h>
 #include <arch/hlt.h>
 #include <arch/io.h>
-#include <arch/romcc_io.h>
 #include <cbmem.h>
 #include <arch/cbfs.h>
 #include <cbfs.h>
diff --git a/src/northbridge/intel/haswell/report_platform.c b/src/northbridge/intel/haswell/report_platform.c
index 9a141b6940..8bb4a05fbc 100644
--- a/src/northbridge/intel/haswell/report_platform.c
+++ b/src/northbridge/intel/haswell/report_platform.c
@@ -22,9 +22,7 @@
 #include <string.h>
 #include "southbridge/intel/lynxpoint/pch.h"
 #include <arch/io.h>
-#include <arch/io.h>
 #include <cpu/x86/msr.h>
-#include <arch/romcc_io.h>
 #include "haswell.h"
 
 static void report_cpu_info(void)
-- 
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