From 5c66f08a3a901eb3e1fe6cfd7f22b90cecbf3cf7 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Tue, 8 Jan 2013 10:10:33 -0600 Subject: haswell: don't add a 0-sized memory range resource It's possible that TOUUD can be 4GiB in a small physical memory configuration. Therefore, don't add a 0-size memory range resouce in that case. Change-Id: I016616a9d9d615417038e9c847c354db7d872819 Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/2691 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/northbridge/intel/haswell/northbridge.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/northbridge/intel/haswell/northbridge.c') diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index d6869c1124..0d611fc105 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -397,7 +397,8 @@ static void mc_add_dram_resources(device_t dev) /* 4GiB -> TOUUD */ base_k = 4096 * 1024; /* 4GiB */ size_k = (unsigned long)(mc_values[TOUUD_REG] >> 10) - base_k; - ram_resource(dev, index++, base_k, size_k); + if (size_k > 0) + ram_resource(dev, index++, base_k, size_k); mmio_resource(dev, index++, legacy_hole_base_k, legacy_hole_size_k); #if CONFIG_CHROMEOS_RAMOOPS -- cgit v1.2.3