From 88af0f38eb19f956e8df2b62254c10c7603a9a33 Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Sun, 3 Jun 2018 12:37:54 +0200
Subject: cpu/intel/haswell: Switch to POSTCAR_STAGE
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Tested on Google Peppy (Acer C720).

Change-Id: I1802547d7a5b3875689cc4e126e7c189a75defa9
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/26793
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/northbridge/intel/haswell/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/northbridge/intel/haswell/Kconfig')

diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index 5c8caea92d..5e6956edf0 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -21,6 +21,8 @@ config NORTHBRIDGE_INTEL_HASWELL
 	select INTEL_GMA_ACPI
 	select RELOCATABLE_RAMSTAGE
 	select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
+	select POSTCAR_STAGE
+	select POSTCAR_CONSOLE
 
 if NORTHBRIDGE_INTEL_HASWELL
 
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