From e7377556cc33b10fdba6d956ac83d823478f5eb4 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Thu, 21 Jun 2018 16:20:55 +0300 Subject: device: Use pcidev_path_on_root() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I2e28b9f4ecaf258bff8a062b5a54cb3d8e2bb9b0 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/30400 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/northbridge/intel/gm45/raminit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/northbridge/intel/gm45') diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c index 2d7965f286..4996c8621a 100644 --- a/src/northbridge/intel/gm45/raminit.c +++ b/src/northbridge/intel/gm45/raminit.c @@ -1165,7 +1165,7 @@ static unsigned int get_mmio_size(void) const struct device *dev; const struct northbridge_intel_gm45_config *cfg = NULL; - dev = dev_find_slot(0, HOST_BRIDGE); + dev = pcidev_path_on_root(HOST_BRIDGE); if (dev) cfg = dev->chip_info; -- cgit v1.2.3