From e55825f3c6686faba7af0538b3967a95ba26e10c Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Thu, 18 May 2023 13:53:35 +0200 Subject: nb/intel/gm45/gma: Use res2mmio() directly for GTT access This is how res2mmio() is supposed to be used and there was no other use of the `mmio` variable left anyway. Change-Id: Ifa4645bcc9ae971966587d9b67662b9dc8bae3d0 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/coreboot/+/75377 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Felix Singer --- src/northbridge/intel/gm45/gma.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'src/northbridge/intel/gm45') diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c index ef7b872b58..6034ae301e 100644 --- a/src/northbridge/intel/gm45/gma.c +++ b/src/northbridge/intel/gm45/gma.c @@ -172,7 +172,6 @@ const char *gm45_get_lvds_edid_str(void) static void gma_func0_init(struct device *dev) { - u8 *mmio; const struct northbridge_intel_gm45_config *const conf = dev->chip_info; const char *edid_str; @@ -188,14 +187,12 @@ static void gma_func0_init(struct device *dev) if (!edid_str) printk(BIOS_ERR, "Failed to obtain LVDS EDID string!\n"); - mmio = res2mmio(gtt_res, 0, 0); - /* * GTT base is at a 2M offset and is 2M big. If GTT is smaller than 2M * cycles are simply not decoded which is fine. */ pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); - memset(mmio + 2 * MiB, 0, 2 * MiB); + memset(res2mmio(gtt_res, 2*MiB, 0), 0, 2*MiB); if (CONFIG(NO_GFX_INIT)) pci_and_config16(dev, PCI_COMMAND, ~PCI_COMMAND_MASTER); -- cgit v1.2.3