From dcb688e5ec88ac1d168509fa757c4665ef335ad4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Wed, 4 Sep 2013 01:11:16 +0300
Subject: CBMEM: Unify get_top_of_ram()
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Change-Id: Ic40a51638873642f33c74d80ac41cf082b2fb177
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3904
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@google.com>
---
 src/northbridge/intel/gm45/gm45.h     | 1 -
 src/northbridge/intel/gm45/ram_calc.c | 3 ++-
 2 files changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/northbridge/intel/gm45')

diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
index 2dffcad0fc..227baef082 100644
--- a/src/northbridge/intel/gm45/gm45.h
+++ b/src/northbridge/intel/gm45/gm45.h
@@ -422,7 +422,6 @@ void gm45_late_init(stepping_t);
 
 u32 decode_igd_memory_size(u32 gms);
 u32 decode_igd_gtt_size(u32 gsm);
-u32 get_top_of_ram(void);
 
 void init_iommu(void);
 #endif
diff --git a/src/northbridge/intel/gm45/ram_calc.c b/src/northbridge/intel/gm45/ram_calc.c
index 28e947b393..a029020748 100644
--- a/src/northbridge/intel/gm45/ram_calc.c
+++ b/src/northbridge/intel/gm45/ram_calc.c
@@ -26,6 +26,7 @@
 #include <arch/io.h>
 #include <device/pci_def.h>
 #include <console/console.h>
+#include <cbmem.h>
 #include "gm45.h"
 
 /** Decodes used Graphics Mode Select (GMS) to kilobytes. */
@@ -83,7 +84,7 @@ u32 decode_igd_gtt_size(const u32 gsm)
 	}
 }
 
-u32 get_top_of_ram(void)
+unsigned long get_top_of_ram(void)
 {
 	const pci_devfn_t dev = PCI_DEV(0, 0, 0);
 
-- 
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