From 9907be4bbd7f40f5d7466969c8c735b9a84807aa Mon Sep 17 00:00:00 2001 From: Vladimir Serbinenko Date: Tue, 12 Aug 2014 21:51:28 +0200 Subject: gm45: Reserve RAM for ME if it's active. Change-Id: Icd2b075cec9461f9d6028a8c845f6900b6fe04c8 Signed-off-by: Vladimir Serbinenko Reviewed-on: http://review.coreboot.org/6628 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/northbridge/intel/gm45/raminit.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'src/northbridge/intel/gm45') diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c index 149127f9f4..2d92651b4b 100644 --- a/src/northbridge/intel/gm45/raminit.c +++ b/src/northbridge/intel/gm45/raminit.c @@ -1211,7 +1211,8 @@ static void program_memory_map(const dimminfo_t *const dimms, const channel_mode /* Calculate memory mapping, all values in MB. */ const unsigned int MMIOstart = 0x0c00; /* 3GB, makes MTRR configuration small. */ - const unsigned int ME_SIZE = 0; + const int me_active = pci_read_config8(PCI_DEV(0, 3, 0), PCI_CLASS_REVISION) != 0xff; + const unsigned int ME_SIZE = prejedec || !me_active ? 0 : 32; const unsigned int usedMEsize = (total_mb[0] != total_mb[1]) ? ME_SIZE : 2 * ME_SIZE; const unsigned int claimCapable = !(pci_read_config32(PCI_DEV(0, 0, 0), D0F0_CAPID0 + 4) & (1 << (47 - 32))); @@ -1267,8 +1268,9 @@ static void program_memory_map(const dimminfo_t *const dimms, const channel_mode "TOLUD = %5uMB\n" "TOUUD = %5uMB\n" "REMAP:\t base = %5uMB\n" - "\t limit = %5uMB\n", - TOM, TOLUD, TOUUD, REMAPbase, REMAPlimit); + "\t limit = %5uMB\n" + "usedMEsize: %dMB\n", + TOM, TOLUD, TOUUD, REMAPbase, REMAPlimit, usedMEsize); } static void prejedec_memory_map(const dimminfo_t *const dimms, channel_mode_t mode) { -- cgit v1.2.3