From 8bcd8210ea64bdbb35485d361e645f2c9cfcf763 Mon Sep 17 00:00:00 2001 From: Elyes Haouas Date: Mon, 6 May 2024 11:48:41 +0200 Subject: dram/ddr3: Use the same naming convention as DDR4 Change-Id: Ifaff19c0117b5247d3321605ccc2e97bf8226ca8 Signed-off-by: Elyes Haouas Reviewed-on: https://review.coreboot.org/c/coreboot/+/82216 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/northbridge/intel/gm45/raminit_meminfo.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'src/northbridge/intel/gm45') diff --git a/src/northbridge/intel/gm45/raminit_meminfo.c b/src/northbridge/intel/gm45/raminit_meminfo.c index c2c7f510d8..9fd4065ffc 100644 --- a/src/northbridge/intel/gm45/raminit_meminfo.c +++ b/src/northbridge/intel/gm45/raminit_meminfo.c @@ -24,14 +24,14 @@ static u8 get_dimm_mod_type(const sysinfo_t *sysinfo, const int idx) static void ddr3_read_ids(const sysinfo_t *sysinfo, struct dimm_info *dimm, const int idx) { const u8 addr = sysinfo->spd_map[idx]; - for (int k = 0; k < SPD_DIMM_SERIAL_LEN; k++) { - dimm->serial[k] = smbus_read_byte(addr, SPD_DIMM_SERIAL_NUM + k); + for (int k = 0; k < SPD_DDR3_SERIAL_LEN; k++) { + dimm->serial[k] = smbus_read_byte(addr, SPD_DDR3_SERIAL_NUM + k); } - for (int k = 0; k < SPD_DIMM_PART_LEN; k++) { - dimm->module_part_number[k] = smbus_read_byte(addr, SPD_DIMM_PART_NUM + k); + for (int k = 0; k < SPD_DDR3_PART_LEN; k++) { + dimm->module_part_number[k] = smbus_read_byte(addr, SPD_DDR3_PART_NUM + k); } - dimm->mod_id = (smbus_read_byte(addr, SPD_DIMM_MOD_ID2) << 8) | - (smbus_read_byte(addr, SPD_DIMM_MOD_ID1) << 0); + dimm->mod_id = (smbus_read_byte(addr, SPD_DDR3_MOD_ID2) << 8) | + (smbus_read_byte(addr, SPD_DDR3_MOD_ID1) << 0); } static u32 get_mem_clock_mt(const int clock_index) -- cgit v1.2.3