From 48fa9225ca18e6320e032b8eedf81087de224cc4 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 19 Nov 2018 13:08:01 +0100 Subject: nb/intel/gm45/northbridge.c: Check for NULL pointers Change-Id: Ic12a8c145d6348086f9931af93ce6d3b3dcb9039 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/29688 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/northbridge/intel/gm45/northbridge.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) (limited to 'src/northbridge/intel/gm45') diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index a738905ceb..0fd7fe5a92 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -228,14 +228,23 @@ u32 northbridge_get_tseg_base(void) u32 northbridge_get_tseg_size(void) { - const u8 esmramc = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), - D0F0_ESMRAMC); + struct device *dev = dev_find_slot(0, PCI_DEVFN(0, 0)); + + if (dev == NULL) + die("could not find pci 00:00.0!\n"); + + const u8 esmramc = pci_read_config8(dev, D0F0_ESMRAMC); return decode_tseg_size(esmramc) << 10; } void northbridge_write_smram(u8 smram) { - pci_write_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), D0F0_SMRAM, smram); + struct device *dev = dev_find_slot(0, PCI_DEVFN(0, 0)); + + if (dev == NULL) + die("could not find pci 00:00.0!\n"); + + pci_write_config8(dev, D0F0_SMRAM, smram); } /* -- cgit v1.2.3