From 468d02cc82151366a2781c9af29e6737105495cb Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Wed, 23 Oct 2019 21:44:42 -0600 Subject: src/[northbridge,security]: change "unsigned" to "unsigned int" Signed-off-by: Martin Roth Change-Id: If6b5930f78c3da6dcefaa7b6202cd0424a24525b Reviewed-on: https://review.coreboot.org/c/coreboot/+/36331 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/northbridge/intel/gm45/raminit.c | 2 +- src/northbridge/intel/gm45/raminit_read_write_training.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/northbridge/intel/gm45') diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c index 7a30b761c5..a2c7643fb0 100644 --- a/src/northbridge/intel/gm45/raminit.c +++ b/src/northbridge/intel/gm45/raminit.c @@ -175,7 +175,7 @@ void get_gmch_info(sysinfo_t *sysinfo) printk(BIOS_SPEW, "GMCH supports DDR3 with %d MT or less\n", sysinfo->max_ddr3_mt); } - const unsigned max_fsb = (capid >> 28) & 0x3; + const unsigned int max_fsb = (capid >> 28) & 0x3; switch (max_fsb) { case 1: sysinfo->max_fsb_mhz = 1067; diff --git a/src/northbridge/intel/gm45/raminit_read_write_training.c b/src/northbridge/intel/gm45/raminit_read_write_training.c index 3f5dbca8fc..8b1e29287d 100644 --- a/src/northbridge/intel/gm45/raminit_read_write_training.c +++ b/src/northbridge/intel/gm45/raminit_read_write_training.c @@ -22,7 +22,7 @@ typedef struct { u32 addr[RANKS_PER_CHANNEL]; - unsigned count; + unsigned int count; } address_bunch_t; /* Read Training. */ -- cgit v1.2.3