From ef20ecc92b59b6edc42c06856931a591e71452ac Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Thu, 4 Oct 2018 13:50:14 +0200 Subject: nb/intel/{gm45,i945,pineview}: Use macro instead of GGC address Change-Id: I233e835180fd445961b6deb74ea7afc2821c236e Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/28909 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/northbridge/intel/gm45/iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/northbridge/intel/gm45/iommu.c') diff --git a/src/northbridge/intel/gm45/iommu.c b/src/northbridge/intel/gm45/iommu.c index 0108116666..f42456413b 100644 --- a/src/northbridge/intel/gm45/iommu.c +++ b/src/northbridge/intel/gm45/iommu.c @@ -46,7 +46,7 @@ void init_iommu() MCHBAR32(0x20) = IOMMU_BASE4 | 1; /* all other DMA sources */ /* clear GTT */ - u32 gtt = pci_read_config16(PCI_DEV(0, 0, 0), 0x52); + u16 gtt = pci_read_config16(PCI_DEV(0, 0, 0), D0F0_GGC); if (gtt & 0x400) { /* VT mode */ pci_devfn_t igd = PCI_DEV(0, 2, 0); -- cgit v1.2.3