From c70eed1e6202c928803f3e7f79161cd247a62b23 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Tue, 22 May 2018 02:18:00 +0300 Subject: device: Use pcidev_on_root() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc Signed-off-by: Kyösti Mälkki Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/26484 Tested-by: build bot (Jenkins) Reviewed-by: Piotr Król Reviewed-by: Arthur Heymans --- src/northbridge/intel/gm45/acpi.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'src/northbridge/intel/gm45/acpi.c') diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c index 467c6c195e..dc5937230f 100644 --- a/src/northbridge/intel/gm45/acpi.c +++ b/src/northbridge/intel/gm45/acpi.c @@ -68,9 +68,11 @@ unsigned long acpi_fill_mcfg(unsigned long current) static unsigned long acpi_fill_dmar(unsigned long current) { - int me_active = (dev_find_slot(0, PCI_DEVFN(3, 0)) != NULL) && - (pci_read_config8(dev_find_slot(0, PCI_DEVFN(3, 0)), PCI_CLASS_REVISION) != 0xff); - int stepping = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), PCI_CLASS_REVISION); + int me_active = (pcidev_on_root(3, 0) != NULL) && + (pci_read_config8(pcidev_on_root(3, 0), PCI_CLASS_REVISION) != + 0xff); + int stepping = pci_read_config8(pcidev_on_root(0, 0), + PCI_CLASS_REVISION); unsigned long tmp = current; current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE1); -- cgit v1.2.3