From 3a4edb6ea815fa24f02daeae9b80e6bde0871a9e Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sun, 3 Jun 2018 12:42:10 +0200 Subject: nb/intel/gm45: Switch to POSTCAR_STAGE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I02165cf63710bedcafe9287cbe8a1d1fe41ebae2 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/26788 Reviewed-by: Kyösti Mälkki Tested-by: build bot (Jenkins) --- src/northbridge/intel/gm45/Makefile.inc | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/northbridge/intel/gm45/Makefile.inc') diff --git a/src/northbridge/intel/gm45/Makefile.inc b/src/northbridge/intel/gm45/Makefile.inc index fdf0012ec4..c12bbf14ae 100644 --- a/src/northbridge/intel/gm45/Makefile.inc +++ b/src/northbridge/intel/gm45/Makefile.inc @@ -36,4 +36,6 @@ ramstage-y += gma.c smm-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/lapic/apic_timer.c +postcar-y += ram_calc.c + endif -- cgit v1.2.3