From f1e3c763b3eef15dbfae73f485408a0dec230d00 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Mon, 22 Dec 2014 12:28:07 +0200 Subject: CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEM MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The name was always obscure and confusing. Instead define cbmem_top() directly in the chipset code for x86 like on ARMs. TODO: Check TSEG alignment, it used for MTRR programming. Change-Id: Ibbe5f05ab9c7d87d09caa673766cd17d192cd045 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/7888 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/northbridge/intel/fsp_rangeley/raminit.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) (limited to 'src/northbridge/intel/fsp_rangeley') diff --git a/src/northbridge/intel/fsp_rangeley/raminit.c b/src/northbridge/intel/fsp_rangeley/raminit.c index 3513c0f33d..9626745e47 100644 --- a/src/northbridge/intel/fsp_rangeley/raminit.c +++ b/src/northbridge/intel/fsp_rangeley/raminit.c @@ -26,19 +26,23 @@ #include "northbridge.h" #include -unsigned long get_top_of_ram(void) +static uintptr_t smm_region_start(void) { /* * Calculate the top of usable (low) DRAM. * The FSP's reserved memory sits just below the SMM region, * allowing calculation of the top of usable memory. */ - u32 tom = sideband_read(B_UNIT, BMBOUND); - u32 bsmmrrl = sideband_read(B_UNIT, BSMMRRL) << 20; + uintptr_t tom = sideband_read(B_UNIT, BMBOUND); + uintptr_t bsmmrrl = sideband_read(B_UNIT, BSMMRRL) << 20; if (bsmmrrl) { tom = bsmmrrl; } - tom -= FSP_RESERVE_MEMORY_SIZE; - return (unsigned long) tom; + return tom; +} + +void *cbmem_top(void) +{ + return (void *) (smm_region_start() - FSP_RESERVE_MEMORY_SIZE); } -- cgit v1.2.3