From 5e2ac2c0795628ab086da76304cd97b16e1d169f Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 20 Dec 2017 21:25:12 +0100 Subject: nb/intel/fsp_rangeley: Use MSR_PLATFORM_INFO instead of 0xce Change-Id: Ifb8aa43b6545482bc7fc136a90c4bbaa18d46089 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/22957 Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- src/northbridge/intel/fsp_rangeley/udelay.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/northbridge/intel/fsp_rangeley') diff --git a/src/northbridge/intel/fsp_rangeley/udelay.c b/src/northbridge/intel/fsp_rangeley/udelay.c index 5aca22974f..01989abb37 100644 --- a/src/northbridge/intel/fsp_rangeley/udelay.c +++ b/src/northbridge/intel/fsp_rangeley/udelay.c @@ -43,7 +43,7 @@ void udelay(u32 us) u32 fsb = 100, divisor; u32 d; /* ticks per us */ - msr = rdmsr(0xce); + msr = rdmsr(MSR_PLATFORM_INFO); divisor = (msr.lo >> 8) & 0xff; d = fsb * divisor; -- cgit v1.2.3