From 29cc9eda2021a87396ef31a6fc81daff6fd1be7a Mon Sep 17 00:00:00 2001 From: Myles Watson Date: Thu, 2 Jul 2009 18:56:24 +0000 Subject: Move the v3 resource allocator to v2. Major changes: 1. Separate resource allocation into: A. Read Resources B. Avoid fixed resources (constrain limits) C. Allocate resources D. Set resources Usage notes: Resources which have IORESOURCE_FIXED set in the flags constrain the placement of other resources. All fixed resources will end up outside (above or below) the allocated resources. Domains usually start with base = 0 and limit = 2^address_bits - 1. I've added an IOAPIC to all platforms so that the old limit of 0xfec00000 is still there for resources. Some platforms may want to change that, but I didn't want to break anyone's board. Resources are allocated in a single block for memory and another for I/O. Currently the resource allocator doesn't support holes. Signed-off-by: Myles Watson Acked-by: Ronald G. Minnich Acked-by: Patrick Georgi git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4394 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/intel/e7520/northbridge.c | 41 ++++++------------------------- 1 file changed, 7 insertions(+), 34 deletions(-) (limited to 'src/northbridge/intel/e7520/northbridge.c') diff --git a/src/northbridge/intel/e7520/northbridge.c b/src/northbridge/intel/e7520/northbridge.c index 47e6266aa6..da3d71b91f 100644 --- a/src/northbridge/intel/e7520/northbridge.c +++ b/src/northbridge/intel/e7520/northbridge.c @@ -28,30 +28,6 @@ static void ram_resource(device_t dev, unsigned long index, IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; } - -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0)); - resource->base = 0; - resource->size = 0; - resource->align = 0; - resource->gran = 0; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0)); - resource->base = 0; - resource->size = 0; - resource->align = 0; - resource->gran = 0; - resource->limit = 0xffffffffUL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void tolm_test(void *gp, struct device *dev, struct resource *new) { struct resource **best_p = gp; @@ -90,7 +66,7 @@ static void pci_domain_set_resources(device_t dev) #if 1 printk_debug("PCI mem marker = %x\n", pci_tolm); -#endif +#endif /* FIXME Me temporary hack */ if(pci_tolm > 0xe0000000) pci_tolm = 0xe0000000; @@ -122,7 +98,7 @@ static void pci_domain_set_resources(device_t dev) remapbasek = 0x3ff << 16; remaplimitk = 0 << 16; remapoffsetk = 0 << 16; - } + } else { /* The PCI memory hole overlaps memory * setup the remap window. @@ -165,7 +141,7 @@ static void pci_domain_set_resources(device_t dev) ram_resource(dev, 5, 4096*1024, tomk - 4*1024*1024); } if (remaplimitk >= remapbasek) { - ram_resource(dev, 6, remapbasek, + ram_resource(dev, 6, remapbasek, (remaplimitk + 64*1024) - remapbasek); } @@ -178,13 +154,10 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) +static u32 e7520_domain_scan_bus(device_t dev, u32 max) { - max = pci_scan_bus(&dev->link[0], 0, 0xff, max); - if (max > max_bus) { - max_bus = max; - } - return max; + max_bus = pci_domain_scan_bus(dev, max); + return max_bus; } static struct device_operations pci_domain_ops = { @@ -192,7 +165,7 @@ static struct device_operations pci_domain_ops = { .set_resources = pci_domain_set_resources, .enable_resources = enable_childrens_resources, .init = 0, - .scan_bus = pci_domain_scan_bus, + .scan_bus = e7520_domain_scan_bus, .ops_pci_bus = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */ }; -- cgit v1.2.3