From 234781e074919c6e6e5b78f6d323d214f1aed3a9 Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Mon, 7 Jul 2014 23:54:59 +1000 Subject: northbridge: Trivial - drop trailing blank lines at EOF MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I9515778e97cc5ae0e366b888da90a651ae5994fe Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/6210 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/northbridge/intel/e7505/debug.h | 1 - src/northbridge/intel/e7505/e7505.h | 1 - src/northbridge/intel/e7505/northbridge.c | 1 - 3 files changed, 3 deletions(-) (limited to 'src/northbridge/intel/e7505') diff --git a/src/northbridge/intel/e7505/debug.h b/src/northbridge/intel/e7505/debug.h index a517fc0c2d..2b060e67a3 100644 --- a/src/northbridge/intel/e7505/debug.h +++ b/src/northbridge/intel/e7505/debug.h @@ -12,4 +12,3 @@ void dump_io_resources(unsigned port); void dump_mem(unsigned start, unsigned end); #endif - diff --git a/src/northbridge/intel/e7505/e7505.h b/src/northbridge/intel/e7505/e7505.h index 456a0a9f58..08b681ac3d 100644 --- a/src/northbridge/intel/e7505/e7505.h +++ b/src/northbridge/intel/e7505/e7505.h @@ -82,4 +82,3 @@ #define NERR_GLOBAL 0x44 /* Next global error register, 32 bits */ #define DRAM_FERR 0x80 /* DRAM first error register, 8 bits */ #define DRAM_NERR 0x82 /* DRAM next error register, 8 bits */ - diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c index a63029b8c0..8f1632dd47 100644 --- a/src/northbridge/intel/e7505/northbridge.c +++ b/src/northbridge/intel/e7505/northbridge.c @@ -142,4 +142,3 @@ struct chip_operations northbridge_intel_e7505_ops = { CHIP_NAME("Intel E7505 Northbridge") .enable_dev = enable_dev, }; - -- cgit v1.2.3