From 3e893bbed55f678155dfb58750376ad60a85e119 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Fri, 1 Jun 2018 06:32:20 +0300 Subject: intel/socket_mPGA604 intel/e7505: Switch to POSTCAR_STAGE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ie522e8fda1d6e80cc45c990ff19a5050165d8030 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/26748 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Aaron Durbin --- src/northbridge/intel/e7505/Makefile.inc | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/northbridge/intel/e7505/Makefile.inc') diff --git a/src/northbridge/intel/e7505/Makefile.inc b/src/northbridge/intel/e7505/Makefile.inc index 57c870fde4..7f7c5e40aa 100644 --- a/src/northbridge/intel/e7505/Makefile.inc +++ b/src/northbridge/intel/e7505/Makefile.inc @@ -6,4 +6,6 @@ ramstage-y += memmap.c romstage-y += raminit.c romstage-y += debug.c romstage-y += memmap.c + +postcar-y += memmap.c endif -- cgit v1.2.3