From 717b6e3151b6ea42aaa4b1ab2a708e143d098878 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Thu, 17 May 2018 14:16:03 +0300 Subject: aopen/dxplplusu intel/e7505: Move to EARLY_CBMEM_INIT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With implementation of LATE_CBMEM_INIT, top-of-low-memory TOLM was adjusted late in ramstage. We do not allow that with EARLY_CBMEM_INIT so the previous maximum of 1024 MiB of MMIO space is now used with statically set TOLM. Also remove support code for the obsolete LATE_CBMEM_INIT this northbridge used. Change-Id: Ib3094903d7614d2212fbe1870248962fbc92e412 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/26585 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/northbridge/intel/e7505/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'src/northbridge/intel/e7505/Kconfig') diff --git a/src/northbridge/intel/e7505/Kconfig b/src/northbridge/intel/e7505/Kconfig index 702ba1c913..bf35a6d11c 100644 --- a/src/northbridge/intel/e7505/Kconfig +++ b/src/northbridge/intel/e7505/Kconfig @@ -22,7 +22,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy def_bool y select NO_MMCONF_SUPPORT select HAVE_DEBUG_RAM_SETUP - select LATE_CBMEM_INIT config HW_SCRUBBER bool -- cgit v1.2.3