From d7ee9dda708321f80161695714737b0f974509d3 Mon Sep 17 00:00:00 2001 From: Iru Cai Date: Wed, 24 Feb 2016 15:03:58 +0800 Subject: northbridge/intel: add missing #include guards I first found the missing of #include guards when I tried to include both sandybridge/gma.h and sandybridge/sandybridge.h, but sandybridge.h includes gma.h in it and gives a compile error. Change-Id: I13fdb8014b82e6065be2064137b7ea10062deaca Signed-off-by: Iru Cai Reviewed-on: https://review.coreboot.org/13775 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/northbridge/intel/e7501/e7501.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/northbridge/intel/e7501/e7501.h') diff --git a/src/northbridge/intel/e7501/e7501.h b/src/northbridge/intel/e7501/e7501.h index a9690d814c..a2800fc896 100644 --- a/src/northbridge/intel/e7501/e7501.h +++ b/src/northbridge/intel/e7501/e7501.h @@ -18,6 +18,9 @@ * e7501.h: PCI configuration space for the Intel E7501 memory controller */ +#ifndef NORTHBRIDGE_INTEL_E7501_E7501_H +#define NORTHBRIDGE_INTEL_E7501_E7501_H + /************ D0:F0 ************/ // Register offsets #define MAYBE_SMRBASE 0x14 /* System Memory RCOMP Base Address Register, 32 bit? (if similar to 855PM) */ @@ -73,3 +76,5 @@ #define NERR_GLOBAL 0x44 /* Next global error register, 32 bits */ #define DRAM_FERR 0x80 /* DRAM first error register, 8 bits */ #define DRAM_NERR 0x82 /* DRAM next error register, 8 bits */ + +#endif /* NORTHBRIDGE_INTEL_E7501_E7501_H */ -- cgit v1.2.3