From f1b58b78351d7ed220673e688a2f7bc9e96da4e2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Fri, 1 Mar 2019 13:43:02 +0200
Subject: device/pci: Fix PCI accessor headers
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

PCI config accessors are no longer indirectly included
from <arch/io.h> use <device/pci_ops.h> instead.

Change-Id: I2adf46430a33bc52ef69d1bf7dca4655fc8475bd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
---
 src/northbridge/amd/agesa/family12/northbridge.c      | 1 +
 src/northbridge/amd/agesa/family14/northbridge.c      | 1 +
 src/northbridge/amd/agesa/family15tn/northbridge.c    | 1 +
 src/northbridge/amd/agesa/family16kb/northbridge.c    | 1 +
 src/northbridge/amd/amdfam10/debug.c                  | 1 +
 src/northbridge/amd/amdfam10/early_ht.c               | 1 +
 src/northbridge/amd/amdfam10/northbridge.c            | 1 +
 src/northbridge/amd/amdfam10/pci.c                    | 1 +
 src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c | 1 +
 src/northbridge/amd/amdfam10/reset_test.c             | 1 +
 src/northbridge/amd/amdfam10/setup_resource_map.c     | 1 +
 src/northbridge/amd/amdht/comlib.c                    | 1 +
 src/northbridge/amd/amdht/h3finit.c                   | 1 +
 src/northbridge/amd/amdht/ht_wrapper.c                | 1 +
 src/northbridge/amd/amdk8/reset_test.c                | 1 +
 src/northbridge/amd/amdmct/mct/mct_d.c                | 1 +
 src/northbridge/amd/amdmct/mct_ddr3/mct_d.c           | 1 +
 src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c        | 1 +
 src/northbridge/amd/pi/00630F01/northbridge.c         | 1 +
 src/northbridge/amd/pi/00660F01/northbridge.c         | 1 +
 src/northbridge/amd/pi/00730F01/northbridge.c         | 1 +
 src/northbridge/amd/pi/ramtop.c                       | 1 +
 22 files changed, 22 insertions(+)

(limited to 'src/northbridge/amd')

diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index f50a643ca2..243f5bb37f 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -17,6 +17,7 @@
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <stdint.h>
 #include <device/device.h>
 #include <device/pci.h>
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index 219970fc00..8e1c2ef782 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -15,6 +15,7 @@
 
 #include <console/console.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <stdint.h>
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index edc4585c70..0e1092045c 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -16,6 +16,7 @@
 
 #include <console/console.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <stdint.h>
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c
index b283094f07..d4c5c61c6a 100644
--- a/src/northbridge/amd/agesa/family16kb/northbridge.c
+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c
@@ -15,6 +15,7 @@
 
 #include <console/console.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <stdint.h>
diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c
index 55a00e1e7a..405a7009bc 100644
--- a/src/northbridge/amd/amdfam10/debug.c
+++ b/src/northbridge/amd/amdfam10/debug.c
@@ -16,6 +16,7 @@
 #include "debug.h"
 #include <console/console.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <delay.h>
 
diff --git a/src/northbridge/amd/amdfam10/early_ht.c b/src/northbridge/amd/amdfam10/early_ht.c
index c68b0c44fa..7ace6b7694 100644
--- a/src/northbridge/amd/amdfam10/early_ht.c
+++ b/src/northbridge/amd/amdfam10/early_ht.c
@@ -16,6 +16,7 @@
 #include "early_ht.h"
 #include <inttypes.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <device/pci_def.h>
 
 // For SB HT chain only
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index c0c6eeb2cd..8bf6d9ec32 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -17,6 +17,7 @@
 
 #include <console/console.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <stdint.h>
 #include <device/device.h>
 #include <device/pci.h>
diff --git a/src/northbridge/amd/amdfam10/pci.c b/src/northbridge/amd/amdfam10/pci.c
index 6c6d717cba..410923a01e 100644
--- a/src/northbridge/amd/amdfam10/pci.c
+++ b/src/northbridge/amd/amdfam10/pci.c
@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <device/pci_ops.h>
 #include "pci.h"
 
 /* bit [10,8] are dev func, bit[1,0] are dev index */
diff --git a/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c b/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c
index dce205333f..218df75887 100644
--- a/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c
+++ b/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c
@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <device/pci_ops.h>
 #include <northbridge/amd/amdfam10/raminit.h>
 #include <northbridge/amd/amdfam10/amdfam10.h>
 #include <delay.h>
diff --git a/src/northbridge/amd/amdfam10/reset_test.c b/src/northbridge/amd/amdfam10/reset_test.c
index 22f48b1ab7..76d1144e7d 100644
--- a/src/northbridge/amd/amdfam10/reset_test.c
+++ b/src/northbridge/amd/amdfam10/reset_test.c
@@ -15,6 +15,7 @@
 
 #include <stdint.h>
 #include <cpu/x86/lapic.h>
+#include <device/pci_ops.h>
 #include <northbridge/amd/amdfam10/raminit.h>
 #include <northbridge/amd/amdfam10/amdfam10.h>
 
diff --git a/src/northbridge/amd/amdfam10/setup_resource_map.c b/src/northbridge/amd/amdfam10/setup_resource_map.c
index 5984178522..38475f3874 100644
--- a/src/northbridge/amd/amdfam10/setup_resource_map.c
+++ b/src/northbridge/amd/amdfam10/setup_resource_map.c
@@ -16,6 +16,7 @@
 
 #include <inttypes.h>
 #include <console/console.h>
+#include <device/pci_ops.h>
 #include <northbridge/amd/amdfam10/raminit.h>
 #include <northbridge/amd/amdfam10/amdfam10.h>
 
diff --git a/src/northbridge/amd/amdht/comlib.c b/src/northbridge/amd/amdht/comlib.c
index 7d9a5477ae..3c2477c2ab 100644
--- a/src/northbridge/amd/amdht/comlib.c
+++ b/src/northbridge/amd/amdht/comlib.c
@@ -18,6 +18,7 @@
 #include "comlib.h"
 
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <cpu/amd/msr.h>
 #include <device/pci_def.h>
diff --git a/src/northbridge/amd/amdht/h3finit.c b/src/northbridge/amd/amdht/h3finit.c
index 436cb59dda..f919335360 100644
--- a/src/northbridge/amd/amdht/h3finit.c
+++ b/src/northbridge/amd/amdht/h3finit.c
@@ -29,6 +29,7 @@
 
 #include <arch/cpu.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <cpu/x86/lapic_def.h>
 #include <cpu/amd/msr.h>
diff --git a/src/northbridge/amd/amdht/ht_wrapper.c b/src/northbridge/amd/amdht/ht_wrapper.c
index d005223d96..6552be9532 100644
--- a/src/northbridge/amd/amdht/ht_wrapper.c
+++ b/src/northbridge/amd/amdht/ht_wrapper.c
@@ -17,6 +17,7 @@
 #include <arch/cpu.h>
 #include <cpu/x86/msr.h>
 #include <console/console.h>
+#include <device/pci_ops.h>
 #include "ht_wrapper.h"
 
 /*----------------------------------------------------------------------------
diff --git a/src/northbridge/amd/amdk8/reset_test.c b/src/northbridge/amd/amdk8/reset_test.c
index e58046d39c..a1df9b0fe1 100644
--- a/src/northbridge/amd/amdk8/reset_test.c
+++ b/src/northbridge/amd/amdk8/reset_test.c
@@ -12,6 +12,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <stdint.h>
 #include <cpu/x86/lapic.h>
 #include "amdk8.h"
diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c
index d03ae9ca98..d956315226 100644
--- a/src/northbridge/amd/amdmct/mct/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct/mct_d.c
@@ -35,6 +35,7 @@
 
 #include <string.h>
 #include <cpu/amd/msr.h>
+#include <device/pci_ops.h>
 #include "mct_d.h"
 
 static u8 ReconfigureDIMMspare_D(struct MCTStatStruc *pMCTstat,
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
index 34d1c1f73a..6f09b12a8a 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
@@ -40,6 +40,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/amd/msr.h>
 #include <cpu/x86/mtrr.h>
+#include <device/pci_ops.h>
 #include <arch/acpi.h>
 #include <string.h>
 #include <device/dram/ddr3.h>
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c
index 570838b6bc..6d41560079 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c
@@ -17,6 +17,7 @@
 #include <arch/cpu.h>
 #include <inttypes.h>
 #include <console/console.h>
+#include <device/pci_ops.h>
 #include <string.h>
 #include "mct_d.h"
 #include "mct_d_gcc.h"
diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c
index d606dc5547..ebca9c6bc7 100644
--- a/src/northbridge/amd/pi/00630F01/northbridge.c
+++ b/src/northbridge/amd/pi/00630F01/northbridge.c
@@ -15,6 +15,7 @@
 
 #include <console/console.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/acpi.h>
 #include <stdint.h>
 #include <device/device.h>
diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c
index 00558a5095..ef8297e728 100644
--- a/src/northbridge/amd/pi/00660F01/northbridge.c
+++ b/src/northbridge/amd/pi/00660F01/northbridge.c
@@ -15,6 +15,7 @@
 
 #include <console/console.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/acpi.h>
 #include <stdint.h>
 #include <device/device.h>
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index 81517afa90..0c97e4bfa8 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -17,6 +17,7 @@
 
 #include <console/console.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/acpi.h>
 #include <stdint.h>
 #include <device/device.h>
diff --git a/src/northbridge/amd/pi/ramtop.c b/src/northbridge/amd/pi/ramtop.c
index 8fa81c715a..987d875df3 100644
--- a/src/northbridge/amd/pi/ramtop.c
+++ b/src/northbridge/amd/pi/ramtop.c
@@ -15,6 +15,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <cbmem.h>
 
 #define CBMEM_TOP_SCRATCHPAD 0x78
-- 
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