From 6a00113de8b9060a7227bcfa79b3786e3e592a33 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Thu, 13 Jul 2017 02:20:27 +0200 Subject: Rename __attribute__((packed)) --> __packed Also unify __attribute__ ((..)) to __attribute__((..)) and handle ((__packed__)) like ((packed)) Change-Id: Ie60a51c3fa92b5009724a5b7c2932e361bf3490c Signed-off-by: Stefan Reinauer Reviewed-on: https://review.coreboot.org/15921 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/northbridge/amd/amdfam10/amdfam10.h | 7 ++++--- src/northbridge/amd/amdk8/f.h | 10 ++++++---- src/northbridge/amd/amdk8/pre_f.h | 6 ++++-- src/northbridge/amd/amdmct/mct/mct_d.h | 9 +++++---- 4 files changed, 19 insertions(+), 13 deletions(-) (limited to 'src/northbridge/amd') diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h index 611291acbd..e9f714a62e 100644 --- a/src/northbridge/amd/amdfam10/amdfam10.h +++ b/src/northbridge/amd/amdfam10/amdfam10.h @@ -18,6 +18,7 @@ #define AMDFAM10_H #include +#include #include #include #include "early_ht.h" @@ -934,14 +935,14 @@ struct link_pair_t { u8 nodeid; u8 linkn; u8 rsv; -} __attribute__((packed)); +} __packed; struct nodes_info_t { u32 nodes_in_group; // could be 2, 3, 4, 5, 6, 7, 8 u32 groups_in_plane; // could be 1, 2, 3, 4, 5 u32 planes; // could be 1, 2 u32 up_planes; // down planes will be [up_planes, planes) -} __attribute__((packed)); +} __packed; struct ht_link_config { uint32_t ht_speed_limit; // Speed in MHz; 0 for autodetect (default) @@ -977,7 +978,7 @@ struct sys_info { struct MCTStatStruc MCTstat; struct DCTStatStruc DCTstatA[NODE_NUMS]; -} __attribute__((packed)); +} __packed; /* diff --git a/src/northbridge/amd/amdk8/f.h b/src/northbridge/amd/amdk8/f.h index f3f9c42614..9f09620c95 100644 --- a/src/northbridge/amd/amdk8/f.h +++ b/src/northbridge/amd/amdk8/f.h @@ -1,6 +1,8 @@ #ifndef AMDK8_F_H #define AMDK8_F_H +#include + /* Definitions of various K8 registers */ /* Function 0 */ #define HT_TRANSACTION_CONTROL 0x68 @@ -465,7 +467,7 @@ struct dimm_size { uint8_t col; uint8_t bank; //1, 2, 3 mean 2, 4, 8 uint8_t rank; -} __attribute__((packed)); +} __packed; struct mem_info { // pernode uint32_t dimm_mask; @@ -483,7 +485,7 @@ struct mem_info { // pernode uint8_t is_64MuxMode; uint8_t memclk_set; // we need to use this to retrieve the mem param uint8_t rsv[2]; -} __attribute__((packed)); +} __packed; struct link_pair_st { pci_devfn_t udev; @@ -493,7 +495,7 @@ struct link_pair_st { uint32_t pos; uint32_t offs; -} __attribute__((packed)); +} __packed; struct sys_info { uint8_t ctrl_present[NODE_NUMS]; @@ -516,7 +518,7 @@ struct sys_info { uint32_t sbdn; uint32_t sblk; uint32_t sbbusn; -} __attribute__((packed)); +} __packed; #ifdef __PRE_RAM__ #include diff --git a/src/northbridge/amd/amdk8/pre_f.h b/src/northbridge/amd/amdk8/pre_f.h index abc51b111f..5b1478bf3c 100644 --- a/src/northbridge/amd/amdk8/pre_f.h +++ b/src/northbridge/amd/amdk8/pre_f.h @@ -1,6 +1,8 @@ #ifndef AMDK8_PRE_F_H #define AMDK8_PRE_F_H +#include + /* Definitions of various K8 registers */ /* Function 0 */ #define HT_TRANSACTION_CONTROL 0x68 @@ -247,7 +249,7 @@ struct link_pair_st { uint32_t pos; uint32_t offs; -} __attribute__((packed)); +} __packed; struct sys_info { uint8_t ctrl_present[NODE_NUMS]; @@ -260,7 +262,7 @@ struct sys_info { uint32_t sbdn; uint32_t sblk; uint32_t sbbusn; -} __attribute__((packed)); +} __packed; #ifdef __PRE_RAM__ #include diff --git a/src/northbridge/amd/amdmct/mct/mct_d.h b/src/northbridge/amd/amdmct/mct/mct_d.h index d13143d979..6a69cfae8c 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.h +++ b/src/northbridge/amd/amdmct/mct/mct_d.h @@ -23,6 +23,7 @@ #define DQS_TRAIN_DEBUG 0 #include +#include #include "mct_d_gcc.h" #include #include @@ -275,7 +276,7 @@ struct MCTStatStruc { of sub 4GB dram hole for HW remapping.*/ u32 Sub4GCacheTop; /* If not zero, the 32-bit top of cacheable memory.*/ u32 SysLimit; /* LIMIT[39:8] (system address)*/ -} __attribute__((packed)); +} __packed; /*============================================================================= Global MCT Configuration Status Word (GStatus) @@ -321,7 +322,7 @@ struct DCTPersistentStatStruc { /* CHB DIMM 0 - 4 Check Byte Receiver Enable Delay*/ u16 HostBiosSrvc1; /* Word sized general purpose field for use by host BIOS. Scratch space.*/ u32 HostBiosSrvc2; /* Dword sized general purpose field for use by host BIOS. Scratch space.*/ -} __attribute__((packed)); +} __packed; struct DCTStatStruc { /* A per Node structure*/ @@ -549,7 +550,7 @@ struct DCTStatStruc { /* A per Node structure*/ /* NOTE: This must remain the last entry in this structure */ struct DCTPersistentStatStruc persistentData; -} __attribute__((packed)); +} __packed; /*=============================================================================== Local Error Status Codes (DCTStatStruc.ErrCode) @@ -717,7 +718,7 @@ struct amdmct_memory_info { struct DCTStatStruc dct_stat[MAX_NODES_SUPPORTED]; uint16_t ecc_enabled; uint16_t ecc_scrub_rate; -} __attribute__((packed)); +} __packed; u32 Get_NB32(u32 dev, u32 reg); void Set_NB32(u32 dev, u32 reg, u32 val); -- cgit v1.2.3