From 552b327ca39f12b21a9e1a8dfdb71f3f26abf256 Mon Sep 17 00:00:00 2001 From: Myles Watson Date: Thu, 12 Feb 2009 21:30:06 +0000 Subject: This patch converts __FUNCTION__ to __func__, since __func__ is standard. Signed-off-by: Myles Watson Acked-by: Carl-Daniel Hailfinger git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/amd/gx1/northbridge.c | 8 +++--- src/northbridge/amd/gx2/northbridge.c | 6 ++--- src/northbridge/amd/gx2/northbridgeinit.c | 42 +++++++++++++++---------------- src/northbridge/amd/lx/northbridge.c | 14 +++++------ src/northbridge/amd/lx/northbridgeinit.c | 24 +++++++++--------- 5 files changed, 47 insertions(+), 47 deletions(-) (limited to 'src/northbridge/amd') diff --git a/src/northbridge/amd/gx1/northbridge.c b/src/northbridge/amd/gx1/northbridge.c index 5a01979c0a..247c24304e 100644 --- a/src/northbridge/amd/gx1/northbridge.c +++ b/src/northbridge/amd/gx1/northbridge.c @@ -42,7 +42,7 @@ static void enable_shadow(device_t dev) static void northbridge_init(device_t dev) { - printk_debug("northbridge: %s()\n", __FUNCTION__); + printk_debug("northbridge: %s()\n", __func__); optimize_xbus(dev); enable_shadow(dev); @@ -74,7 +74,7 @@ static void pci_domain_read_resources(device_t dev) { struct resource *resource; - printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __FUNCTION__); + printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__); /* Initialize the system wide io space constraints */ resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0)); @@ -191,7 +191,7 @@ static struct device_operations pci_domain_ops = { static void cpu_bus_init(device_t dev) { - printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __FUNCTION__); + printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__); initialize_cpus(&dev->link[0]); } @@ -209,7 +209,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { - printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __FUNCTION__); + printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__); /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { printk_spew("DEVICE_PATH_PCI_DOMAIN\n"); diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c index 7702d3b5a7..e285e52cb6 100644 --- a/src/northbridge/amd/gx2/northbridge.c +++ b/src/northbridge/amd/gx2/northbridge.c @@ -127,7 +127,7 @@ static void irq_init_steering(struct device *dev, uint16_t irq_map) { /* Set up IRQ steering */ uint32_t pciAddr = 0x80000000 | (CHIPSET_DEV_NUM << 11) | 0x5C; - printk_debug("%s(%08X [%08X], %04X)\n", __FUNCTION__, dev, pciAddr, irq_map); + printk_debug("%s(%08X [%08X], %04X)\n", __func__, dev, pciAddr, irq_map); /* The IRQ steering values (in hex) are effectively dcba, where: * represents the IRQ for INTA, @@ -281,7 +281,7 @@ static void northbridge_init(device_t dev) unsigned long m; struct northbridge_amd_gx2_config *nb = (struct northbridge_amd_gx2_config *)dev->chip_info; - printk_debug("northbridge: %s()\n", __FUNCTION__); + printk_debug("northbridge: %s()\n", __func__); enable_shadow(dev); irq_init_steering(dev, nb->irqmap); @@ -362,7 +362,7 @@ static void pci_domain_read_resources(device_t dev) { struct resource *resource; - printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __FUNCTION__); + printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__); /* Initialize the system wide io space constraints */ resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0)); diff --git a/src/northbridge/amd/gx2/northbridgeinit.c b/src/northbridge/amd/gx2/northbridgeinit.c index eb43c6861f..995c1f3212 100644 --- a/src/northbridge/amd/gx2/northbridgeinit.c +++ b/src/northbridge/amd/gx2/northbridgeinit.c @@ -112,10 +112,10 @@ writeglmsr(struct gliutable *gl){ msr.lo = gl->lo; msr.hi = gl->hi; wrmsr(gl->desc_name, msr); // MSR - see table above - printk_debug("%s: write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo); + printk_debug("%s: write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); /* they do this, so we do this */ msr = rdmsr(gl->desc_name); - printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo); + printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } static void @@ -147,7 +147,7 @@ SysmemInit(struct gliutable *gl) * system. We will adjust for SMM and DMM now and Frame Buffer later. */ sizembytes = sizeram(); - printk_debug("%s: enable for %dm bytes\n", __FUNCTION__, sizembytes); + printk_debug("%s: enable for %dm bytes\n", __func__, sizembytes); sizebytes = sizembytes << 20; sizebytes -= SMM_SIZE*1024 +1; @@ -164,7 +164,7 @@ SysmemInit(struct gliutable *gl) msr.lo = sizebytes; wrmsr(gl->desc_name, msr); // MSR - see table above msr = rdmsr(gl->desc_name); - printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, + printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } @@ -177,11 +177,11 @@ DMMGL0Init(struct gliutable *gl) { if (! havedmi) return; - printk_debug("%s: %d bytes\n", __FUNCTION__, sizebytes); + printk_debug("%s: %d bytes\n", __func__, sizebytes); sizebytes -= DMM_SIZE*1024; offset = sizebytes - DMM_OFFSET; - printk_debug("%s: offset is 0x%08x\n", __FUNCTION__, offset); + printk_debug("%s: offset is 0x%08x\n", __func__, offset); offset >>= 12; msr.hi = (gl->hi) | (offset << 8); /* I don't think this is needed */ @@ -192,7 +192,7 @@ DMMGL0Init(struct gliutable *gl) { wrmsr(gl->desc_name, msr); // MSR - See table above msr = rdmsr(gl->desc_name); - printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo); + printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } static void @@ -202,7 +202,7 @@ DMMGL1Init(struct gliutable *gl) { if (! havedmi) return; - printk_debug("%s:\n", __FUNCTION__ ); + printk_debug("%s:\n", __func__ ); msr.hi = gl->hi; /* I don't think this is needed */ @@ -210,12 +210,12 @@ DMMGL1Init(struct gliutable *gl) { msr.hi |= (DMM_OFFSET >> 24); msr.lo = DMM_OFFSET << 8; /* hmm. AMD source has SMM here ... SMM, not DMM? We think DMM */ - printk_err("%s: warning, using DMM_SIZE even though AMD used SMM_SIZE\n", __FUNCTION__); + printk_err("%s: warning, using DMM_SIZE even though AMD used SMM_SIZE\n", __func__); msr.lo |= ((~(DMM_SIZE*1024)+1)>>12)&0xfffff; wrmsr(gl->desc_name, msr); // MSR - See table above msr = rdmsr(gl->desc_name); - printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo); + printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } static void SMMGL0Init(struct gliutable *gl) { @@ -228,10 +228,10 @@ SMMGL0Init(struct gliutable *gl) { if (havedmi) sizebytes -= DMM_SIZE * 1024; - printk_debug("%s: %d bytes\n", __FUNCTION__, sizebytes); + printk_debug("%s: %d bytes\n", __func__, sizebytes); offset = sizebytes - SMM_OFFSET; - printk_debug("%s: offset is 0x%08x\n", __FUNCTION__, offset); + printk_debug("%s: offset is 0x%08x\n", __func__, offset); offset >>= 12; msr.hi = offset << 8; @@ -242,12 +242,12 @@ SMMGL0Init(struct gliutable *gl) { wrmsr(gl->desc_name, msr); // MSR - See table above msr = rdmsr(gl->desc_name); - printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo); + printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } static void SMMGL1Init(struct gliutable *gl) { msr_t msr; - printk_debug("%s:\n", __FUNCTION__ ); + printk_debug("%s:\n", __func__ ); msr.hi = gl->hi; /* I don't think this is needed */ @@ -258,7 +258,7 @@ SMMGL1Init(struct gliutable *gl) { wrmsr(gl->desc_name, msr); // MSR - See table above msr = rdmsr(gl->desc_name); - printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo); + printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } static void @@ -507,10 +507,10 @@ performance: for(i = 0; gating->msrnum != 0xffffffff; i++) { msr = rdmsr(gating->msrnum); - printk_debug("%s: MSR 0x%08x is 0x%08x:0x%08x\n", __FUNCTION__, gating->msrnum, msr.hi, msr.lo); + printk_debug("%s: MSR 0x%08x is 0x%08x:0x%08x\n", __func__, gating->msrnum, msr.hi, msr.lo); msr.hi |= gating->msr.hi; msr.lo |= gating->msr.lo; - printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __FUNCTION__, + printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __func__, gating->msrnum, msr.hi, msr.lo); wrmsr(gating->msrnum, msr); // MSR - See the table above gating +=1; @@ -526,11 +526,11 @@ GeodeLinkPriority(void){ for(i = 0; prio->msrnum != 0xffffffff; i++) { msr = rdmsr(prio->msrnum); - printk_debug("%s: MSR 0x%08x is 0x%08x:0x%08x\n", __FUNCTION__, prio->msrnum, msr.hi, msr.lo); + printk_debug("%s: MSR 0x%08x is 0x%08x:0x%08x\n", __func__, prio->msrnum, msr.hi, msr.lo); msr.hi |= prio->msr.hi; msr.lo &= ~0xfff; msr.lo |= prio->msr.lo; - printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __FUNCTION__, + printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __func__, prio->msrnum, msr.hi, msr.lo); wrmsr(prio->msrnum, msr); // MSR - See the table above prio +=1; @@ -772,7 +772,7 @@ northbridgeinit(void) { msr_t msr; int i; - printk_debug("Enter %s\n", __FUNCTION__); + printk_debug("Enter %s\n", __func__); for(i = 0; gliutables[i]; i++) GLIUInit(gliutables[i]); @@ -803,6 +803,6 @@ northbridgeinit(void) ClockGatingInit(); __asm__("FINIT\n"); /* CPUBugsFix -- called elsewhere */ - printk_debug("Exit %s\n", __FUNCTION__); + printk_debug("Exit %s\n", __func__); } diff --git a/src/northbridge/amd/lx/northbridge.c b/src/northbridge/amd/lx/northbridge.c index 588023cbbc..9762510cf4 100644 --- a/src/northbridge/amd/lx/northbridge.c +++ b/src/northbridge/amd/lx/northbridge.c @@ -308,7 +308,7 @@ static void northbridge_init(device_t dev) { //msr_t msr; - printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__); + printk_spew(">> Entering northbridge.c: %s\n", __func__); enable_shadow(dev); /* @@ -385,7 +385,7 @@ static const struct pci_driver northbridge_driver __pci_driver = { static void pci_domain_read_resources(device_t dev) { struct resource *resource; - printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__); + printk_spew(">> Entering northbridge.c: %s\n", __func__); /* Initialize the system wide io space constraints */ resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); @@ -420,7 +420,7 @@ static void pci_domain_set_resources(device_t dev) int idx; device_t mc_dev; - printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__); + printk_spew(">> Entering northbridge.c: %s\n", __func__); mc_dev = dev->link[0].children; if (mc_dev) { @@ -436,7 +436,7 @@ static void pci_domain_set_resources(device_t dev) static void pci_domain_enable(device_t dev) { - printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__); + printk_spew(">> Entering northbridge.c: %s\n", __func__); // do this here for now -- this chip really breaks our device model northbridge_init_early(); @@ -459,7 +459,7 @@ static void pci_domain_enable(device_t dev) static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) { - printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__); + printk_spew(">> Entering northbridge.c: %s\n", __func__); max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); return max; @@ -475,7 +475,7 @@ static struct device_operations pci_domain_ops = { static void cpu_bus_init(device_t dev) { - printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__); + printk_spew(">> Entering northbridge.c: %s\n", __func__); initialize_cpus(&dev->link[0]); } @@ -495,7 +495,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { printk_spew(">> Entering northbridge.c: %s with path %d\n", - __FUNCTION__, dev->path.type); + __func__, dev->path.type); /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) diff --git a/src/northbridge/amd/lx/northbridgeinit.c b/src/northbridge/amd/lx/northbridgeinit.c index 057076380b..4f00a80891 100644 --- a/src/northbridge/amd/lx/northbridgeinit.c +++ b/src/northbridge/amd/lx/northbridgeinit.c @@ -108,7 +108,7 @@ static void writeglmsr(struct gliutable *gl) msr.lo = gl->lo; msr.hi = gl->hi; wrmsr(gl->desc_name, msr); // MSR - see table above - printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo); // GX3 + printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); // GX3 } static void ShadowInit(struct gliutable *gl) @@ -133,7 +133,7 @@ static void SysmemInit(struct gliutable *gl) * system. We will adjust for SMM now and Frame Buffer later. */ sizembytes = sizeram(); - printk_debug("%s: enable for %dMBytes\n", __FUNCTION__, sizembytes); + printk_debug("%s: enable for %dMBytes\n", __func__, sizembytes); sizebytes = sizembytes << 20; sizebytes -= ((SMM_SIZE * 1024) + 1); @@ -149,7 +149,7 @@ static void SysmemInit(struct gliutable *gl) msr.lo = sizebytes; wrmsr(gl->desc_name, msr); // MSR - see table above - printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, + printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } @@ -161,12 +161,12 @@ static void SMMGL0Init(struct gliutable *gl) sizebytes -= (SMM_SIZE * 1024); - printk_debug("%s: %d bytes\n", __FUNCTION__, sizebytes); + printk_debug("%s: %d bytes\n", __func__, sizebytes); /* calculate the Two's complement offset */ offset = sizebytes - SMM_OFFSET; offset = (offset >> 12) & 0x000fffff; - printk_debug("%s: offset is 0x%08x\n", __FUNCTION__, SMM_OFFSET); + printk_debug("%s: offset is 0x%08x\n", __func__, SMM_OFFSET); msr.hi = offset << 8 | gl->hi; msr.hi |= SMM_OFFSET >> 24; @@ -175,14 +175,14 @@ static void SMMGL0Init(struct gliutable *gl) msr.lo |= ((~(SMM_SIZE * 1024) + 1) >> 12) & 0xfffff; wrmsr(gl->desc_name, msr); // MSR - See table above - printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, + printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } static void SMMGL1Init(struct gliutable *gl) { msr_t msr; - printk_debug("%s:\n", __FUNCTION__); + printk_debug("%s:\n", __func__); msr.hi = gl->hi; /* I don't think this is needed */ @@ -192,7 +192,7 @@ static void SMMGL1Init(struct gliutable *gl) msr.lo |= ((~(SMM_SIZE * 1024) + 1) >> 12) & 0xfffff; wrmsr(gl->desc_name, msr); // MSR - See table above - printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, + printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } @@ -437,7 +437,7 @@ static void ClockGatingInit(void) msr = rdmsr(gating->msrnum); msr.hi |= gating->msr.hi; msr.lo |= gating->msr.lo; - /* printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __FUNCTION__, + /* printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __func__, gating->msrnum, msr.hi, msr.lo); */// GX3 wrmsr(gating->msrnum, msr); // MSR - See the table above gating += 1; @@ -456,7 +456,7 @@ static void GeodeLinkPriority(void) msr.hi |= prio->msr.hi; msr.lo &= ~0xfff; msr.lo |= prio->msr.lo; - /* printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __FUNCTION__, + /* printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __func__, prio->msrnum, msr.hi, msr.lo); */// GX3 wrmsr(prio->msrnum, msr); // MSR - See the table above prio += 1; @@ -751,7 +751,7 @@ void northbridge_init_early(void) { msr_t msr; int i; - printk_debug("Enter %s\n", __FUNCTION__); + printk_debug("Enter %s\n", __func__); for (i = 0; gliutables[i]; i++) GLIUInit(gliutables[i]); @@ -771,5 +771,5 @@ void northbridge_init_early(void) ClockGatingInit(); __asm__ __volatile__("FINIT\n"); - printk_debug("Exit %s\n", __FUNCTION__); + printk_debug("Exit %s\n", __func__); } -- cgit v1.2.3