From 617536e5802a10141271d342611508d139944c69 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Wed, 4 May 2016 16:26:44 -0700 Subject: amd/gx2 + amd/lx: Fix shift overflow issue gcc 6.1 complains that SMM_OFFSET << 8 is larger than the register it is assigned to (rightly so): src/northbridge/amd/gx2/northbridgeinit.c:196:23: error: result of '1077936128 << 8' requires 40 bits to represent, but 'int' only has 32 bits [-Werror=shift-overflow=] msr.lo = (SMM_OFFSET << 8) & 0xfff00000; ^~ Change-Id: Ib0d669268202d222574abee335a6a65c8a255cc7 Signed-off-by: Stefan Reinauer Reviewed-on: https://review.coreboot.org/14617 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/northbridge/amd/gx2/northbridgeinit.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/northbridge/amd/gx2') diff --git a/src/northbridge/amd/gx2/northbridgeinit.c b/src/northbridge/amd/gx2/northbridgeinit.c index 348cdb941c..efbe51ef11 100644 --- a/src/northbridge/amd/gx2/northbridgeinit.c +++ b/src/northbridge/amd/gx2/northbridgeinit.c @@ -177,7 +177,7 @@ static void SMMGL0Init(struct gliutable *gl) msr.hi = offset << 8 | gl->hi; msr.hi |= SMM_OFFSET >> 24; - msr.lo = SMM_OFFSET << 8; + msr.lo = (SMM_OFFSET & 0x00ffffff) << 8; msr.lo |= ((~(SMM_SIZE * 1024) + 1) >> 12) & 0xfffff; wrmsr(gl->desc_name, msr); /* MSR - See table above */ @@ -193,7 +193,7 @@ static void SMMGL1Init(struct gliutable *gl) /* I don't think this is needed */ msr.hi &= 0xffffff00; msr.hi |= (SMM_OFFSET >> 24); - msr.lo = (SMM_OFFSET << 8) & 0xfff00000; + msr.lo = (SMM_OFFSET & 0x00fff000) << 8; msr.lo |= ((~(SMM_SIZE * 1024) + 1) >> 12) & 0xfffff; wrmsr(gl->desc_name, msr); /* MSR - See table above */ -- cgit v1.2.3