From 6e8b3c11105682e58ccb0574148654adecc532f7 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Fri, 2 Sep 2016 19:22:00 +0200 Subject: src/northbridge: Improve code formatting Change-Id: Iffa058d9eb1e96a4d1587dc3f8a1740907ffbb32 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/16414 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/northbridge/amd/cimx/rd890/early.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/northbridge/amd/cimx/rd890/early.c') diff --git a/src/northbridge/amd/cimx/rd890/early.c b/src/northbridge/amd/cimx/rd890/early.c index 5852aa363f..4904e5258e 100644 --- a/src/northbridge/amd/cimx/rd890/early.c +++ b/src/northbridge/amd/cimx/rd890/early.c @@ -34,7 +34,7 @@ void sr56x0_rd890_disable_pcie_bridge(void) AMD_NB_CONFIG_BLOCK *cfg_ptr = &cfg_block; AMD_NB_CONFIG *nb_cfg = &(cfg_block.Northbridges[0]); - nb_cfg->ConfigPtr = &cfg_ptr; + nb_cfg->ConfigPtr = &cfg_ptr; nb_dev = MAKE_SBDFO(0, 0x0, 0x0, 0x0, 0x0); val = (1 << 2) | (1 << 3); /*GPP1*/ val |= (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7) | (1 << 16) | (1 << 17); /*GPP3a*/ -- cgit v1.2.3