From 3dbfb2bef9cdb97ac6e34a4268cc4a26e6483013 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 22 May 2019 20:11:49 +0200 Subject: nb/amd/amdmct/mct/mctdqs_d.c: Remove variable set but not used Change-Id: I45f32ea1ebf59a20d475dfad2d9d0980dec6918b Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/32940 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson --- src/northbridge/amd/amdmct/mct/mctdqs_d.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'src/northbridge/amd/amdmct/mct') diff --git a/src/northbridge/amd/amdmct/mct/mctdqs_d.c b/src/northbridge/amd/amdmct/mct/mctdqs_d.c index e2dd56fc1a..36ee3ab332 100644 --- a/src/northbridge/amd/amdmct/mct/mctdqs_d.c +++ b/src/northbridge/amd/amdmct/mct/mctdqs_d.c @@ -1192,8 +1192,6 @@ void mct_Write1LTestPattern_D(struct MCTStatStruc *pMCTstat, void mct_Read1LTestPattern_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat, u32 addr) { - u32 value; - /* BIOS issues the remaining (Ntrain - 2) reads after checking that * F2x11C[PrefDramTrainMode] is cleared. These reads must be to * consecutive cache lines (i.e., 64 bytes apart) and must not cross @@ -1205,5 +1203,5 @@ void mct_Read1LTestPattern_D(struct MCTStatStruc *pMCTstat, SetUpperFSbase(addr); /* 1st move causes read fill (to exclusive or shared)*/ - value = read32_fs(addr << 8); + read32_fs(addr << 8); } -- cgit v1.2.3