From 38424987c6d19015e4572d5371a0f9f621fc46fa Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Sun, 21 Aug 2016 12:01:04 +0200 Subject: src/northbridge: Remove unnecessary whitespace before "\n" and "\t" Change-Id: I6a533667c7c8ff5ec6ab9d4e1cfc51e993a90084 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/16280 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker --- src/northbridge/amd/amdmct/mct/mct_d.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/northbridge/amd/amdmct/mct/mct_d.c') diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c index 0e59e1d2a0..0914065d2a 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.c +++ b/src/northbridge/amd/amdmct/mct/mct_d.c @@ -644,7 +644,7 @@ static void HTMemMapInit_D(struct MCTStatStruc *pMCTstat, devx = pDCTstat->dev_map; if (pDCTstat->NodePresent) { - printk(BIOS_DEBUG, " Copy dram map from Node 0 to Node %02x \n", Node); + printk(BIOS_DEBUG, " Copy dram map from Node 0 to Node %02x\n", Node); reg = 0x40; /*Dram Base 0*/ do { val = Get_NB32(dev, reg); @@ -892,7 +892,7 @@ static void StartupDCT_D(struct MCTStatStruc *pMCTstat, byte = mctGet_NVbits(NV_DQSTrainCTL); if (byte == 1) { /* Enable DQSRcvEn training mode */ - print_t("\t\t\tStartupDCT_D: DqsRcvEnTrain set \n"); + print_t("\t\t\tStartupDCT_D: DqsRcvEnTrain set\n"); reg = 0x78 + reg_off; val = Get_NB32(dev, reg); /* Setting this bit forces a 1T window with hard left @@ -903,7 +903,7 @@ static void StartupDCT_D(struct MCTStatStruc *pMCTstat, Set_NB32(dev, reg, val); } mctHookBeforeDramInit(); /* generalized Hook */ - print_t("\t\t\tStartupDCT_D: DramInit \n"); + print_t("\t\t\tStartupDCT_D: DramInit\n"); mct_DramInit(pMCTstat, pDCTstat, dct); AfterDramInit_D(pDCTstat, dct); mctHookAfterDramInit(); /* generalized Hook*/ -- cgit v1.2.3