From f3cce2f3c4ff4af4a386bddd49c92a55ad9cefa2 Mon Sep 17 00:00:00 2001 From: Scott Duplichan Date: Sat, 13 Nov 2010 19:07:59 +0000 Subject: MTRR related improvements for AMD family 10h and family 0Fh systems -- When building for UMA, reduce the limit for DRAM below 4GB from E0000000 to C0000000. This is needed to accomodate the UMA frame buffer. -- Correct problem where msr C0010010 bits 21 and 22 (MtrrTom2En and Tom2ForceMemTypeWB) are not set consistently across cores. -- Enable TOM2 only if DRAM is present above 4GB. -- Use AMD Tom2ForceMemTypeWB feature to avoid the need for variable MTRR ranges above 4GB. -- Add above4gb flag argument to function x86_setup_var_mtrrs. Clearing this flag causes x86_setup_var_mtrrs() to omit MTRR ranges for DRAM above 4GB. AMD systems use this option to conserve MTRRs. -- Northbridge.c change to deduct UMA memory from DRAM size reported by ram_resource. This corrects a problem where mtrr.c generates an unexpected variable MTRR range. -- Correct problem causing build failure when CONFIG_GFXUMA=1 and CONFIG_VAR_MTRR_HOLE=0. -- Reserve the UMA DRAM range for AMD K8 as is already done for AMD family 10h. Tested with mahogany on ECS A780G-GM with 2GB and 4GB. Tested with mahogany_fam10 on ECS A780G-GM with 2GB and 4GB. Signed-off-by: Scott Duplichan Acked-by: Peter Stuge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/amd/amdk8/northbridge.c | 26 ++++++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) (limited to 'src/northbridge/amd/amdk8') diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 263777f751..1f98684c6b 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -822,11 +822,24 @@ static u32 hoist_memory(unsigned long hole_startk, int node_id) #endif #if CONFIG_WRITE_HIGH_TABLES==1 -#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB +#define HIGH_TABLES_SIZE 64 /* maximum size of high tables in KB */ extern uint64_t high_tables_base, high_tables_size; +#endif + #if CONFIG_GFXUMA == 1 extern uint64_t uma_memory_base, uma_memory_size; -#endif + +static void add_uma_resource(struct device *dev, int index) +{ + struct resource *resource; + + printk(BIOS_DEBUG, "Adding UMA memory area\n"); + resource = new_resource(dev, index); + resource->base = (resource_t) uma_memory_base; + resource->size = (resource_t) uma_memory_size; + resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | + IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; +} #endif static void amdk8_domain_set_resources(device_t dev) @@ -1040,6 +1053,11 @@ static void amdk8_domain_set_resources(device_t dev) /* If sizek == 0, it was split at mmio_basek without a hole. * Don't create an empty ram_resource. */ +#if CONFIG_GFXUMA == 1 + /* Deduct uma memory before reporting because + * this is what the mtrr code expects */ + sizek -= uma_memory_size / 1024; +#endif if (sizek) ram_resource(dev, (idx | i), basek, sizek); idx += 0x10; @@ -1057,6 +1075,10 @@ static void amdk8_domain_set_resources(device_t dev) } #endif } + +#if CONFIG_GFXUMA == 1 + add_uma_resource(dev, 7); +#endif assign_resources(dev->link_list); } -- cgit v1.2.3