From 86091f94b6ca58f4b8795503b274492d6a935c15 Mon Sep 17 00:00:00 2001 From: Alexandru Gagniuc Date: Wed, 30 Sep 2015 20:23:09 -0700 Subject: cpu/mtrr.h: Fix macro names for MTRR registers We use UNDERSCORE_CASE. For the MTRR macros that refer to an MSR, we also remove the _MSR suffix, as they are, by definition, MSRs. Change-Id: Id4483a75d62cf1b478a9105ee98a8f55140ce0ef Signed-off-by: Alexandru Gagniuc Reviewed-on: http://review.coreboot.org/11761 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/northbridge/amd/amdk8/raminit_f_dqs.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/northbridge/amd/amdk8') diff --git a/src/northbridge/amd/amdk8/raminit_f_dqs.c b/src/northbridge/amd/amdk8/raminit_f_dqs.c index 609cddf913..59a5fefd4b 100644 --- a/src/northbridge/amd/amdk8/raminit_f_dqs.c +++ b/src/northbridge/amd/amdk8/raminit_f_dqs.c @@ -1634,13 +1634,13 @@ static void set_var_mtrr_dqs( zero.lo = zero.hi = 0; /* The invalid bit is kept in the mask, so we simply clear the relevant mask register to disable a range. */ - wrmsr (MTRRphysMask_MSR(reg), zero); + wrmsr (MTRR_PHYS_MASK(reg), zero); } else { /* Bit 32-35 of MTRRphysMask should be set to 1 */ base.lo |= type; mask.lo |= 0x800; - wrmsr (MTRRphysBase_MSR(reg), base); - wrmsr (MTRRphysMask_MSR(reg), mask); + wrmsr (MTRR_PHYS_BASE(reg), base); + wrmsr (MTRR_PHYS_MASK(reg), mask); } } -- cgit v1.2.3