From 3eff00ec76f91f5dc9ddf39e2e6073f6053c94a1 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Wed, 19 Apr 2017 12:52:43 +0200 Subject: nb/amd/amdk8: Link reset_test.c This needs some extra headers in amdk8/raminit.c that were otherwise provided by that file. Change-Id: I80450e5eb32eb502b3d777c56790db90491fc995 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/19360 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/northbridge/amd/amdk8/Makefile.inc | 2 ++ src/northbridge/amd/amdk8/amdk8.h | 9 +++++++++ src/northbridge/amd/amdk8/raminit.c | 2 ++ src/northbridge/amd/amdk8/reset_test.c | 15 ++++++--------- 4 files changed, 19 insertions(+), 9 deletions(-) (limited to 'src/northbridge/amd/amdk8') diff --git a/src/northbridge/amd/amdk8/Makefile.inc b/src/northbridge/amd/amdk8/Makefile.inc index fb2aca5cc3..019f38ed92 100644 --- a/src/northbridge/amd/amdk8/Makefile.inc +++ b/src/northbridge/amd/amdk8/Makefile.inc @@ -11,6 +11,8 @@ romstage-$(CONFIG_HAVE_ACPI_RESUME) += exit_from_self.c romstage-y += raminit_f.c endif +romstage-y += reset_test.c + # Enable this if you want to check the values of the PCI routing registers. # Call show_all_routes() anywhere amdk8.h is included. #ramstage-y += util.c diff --git a/src/northbridge/amd/amdk8/amdk8.h b/src/northbridge/amd/amdk8/amdk8.h index 8c472ae16b..bc03b4cfd7 100644 --- a/src/northbridge/amd/amdk8/amdk8.h +++ b/src/northbridge/amd/amdk8/amdk8.h @@ -11,12 +11,21 @@ #include "pre_f.h" #endif +#define HTIC_ColdR_Detect (1<<4) +#define HTIC_BIOSR_Detect (1<<5) +#define HTIC_INIT_Detect (1<<6) + #ifdef __PRE_RAM__ void showallroutes(int level, pci_devfn_t dev); void setup_resource_map_offset(const unsigned int *register_values, int max, unsigned offset_pci_dev, unsigned offset_io_base); void fill_mem_ctrl(int controllers, struct mem_controller *ctrl_a, const uint16_t *spd_addr); #endif +void set_bios_reset(void); +void distinguish_cpu_resets(unsigned int nodeid); +unsigned int get_sblk(void); +unsigned int get_sbbusn(unsigned sblk); + void cpus_ready_for_init(void); #endif /* AMDK8_H */ diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c index 168f7ce437..43229eaa93 100644 --- a/src/northbridge/amd/amdk8/raminit.c +++ b/src/northbridge/amd/amdk8/raminit.c @@ -5,7 +5,9 @@ */ #include +#include #include +#include #include #include #include diff --git a/src/northbridge/amd/amdk8/reset_test.c b/src/northbridge/amd/amdk8/reset_test.c index f998c48b56..0d30016b34 100644 --- a/src/northbridge/amd/amdk8/reset_test.c +++ b/src/northbridge/amd/amdk8/reset_test.c @@ -1,10 +1,8 @@ +#include +#include #include #include -#include "raminit.h" - -#define HTIC_ColdR_Detect (1<<4) -#define HTIC_BIOSR_Detect (1<<5) -#define HTIC_INIT_Detect (1<<6) +#include "amdk8.h" static inline int cpu_init_detected(unsigned nodeid) { @@ -33,7 +31,7 @@ static inline int cold_reset_detected(void) return !(htic & HTIC_ColdR_Detect); } -static inline void distinguish_cpu_resets(unsigned nodeid) +void distinguish_cpu_resets(unsigned int nodeid) { u32 htic; pci_devfn_t device; @@ -43,7 +41,6 @@ static inline void distinguish_cpu_resets(unsigned nodeid) pci_io_write_config32(device, HT_INIT_CONTROL, htic); } -void set_bios_reset(void); void set_bios_reset(void) { u32 htic; @@ -71,7 +68,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link) return 0; } -static inline unsigned get_sblk(void) +unsigned int get_sblk(void) { u32 reg; /* read PCI_DEV(0,0x18,0) 0x64 bit [8:9] to find out SbLink m */ @@ -79,7 +76,7 @@ static inline unsigned get_sblk(void) return ((reg>>8) & 3); } -static inline unsigned get_sbbusn(unsigned sblk) +unsigned int get_sbbusn(unsigned sblk) { return node_link_to_bus(0, sblk); } -- cgit v1.2.3