From 11c79d7fc2c9e04828db8e54c199822e5fa749b8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Wed, 4 Feb 2015 15:23:03 +0200 Subject: AMD K8: Move the test for connected HyperTransport link MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I7f8cbfcae7ec2a49e91ceda1eecdcf76b2137d8b Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/8549 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc Reviewed-by: Stefan Reinauer --- src/northbridge/amd/amdk8/northbridge.c | 32 +++++++++++++++++++------------- 1 file changed, 19 insertions(+), 13 deletions(-) (limited to 'src/northbridge/amd/amdk8') diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 29fa2a42a6..63f543e0a0 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -79,6 +79,23 @@ static void f1_write_config32(unsigned reg, u32 value) } } +static bool is_non_coherent_link(struct device *dev, struct bus *link) +{ + u32 link_type; + do { + link_type = pci_read_config32(dev, link->cap + 0x18); + } while (link_type & ConnectionPending); + + if (!(link_type & LinkConnected)) + return false; + + do { + link_type = pci_read_config32(dev, link->cap + 0x18); + } while (!(link_type & InitComplete)); + + return !!(link_type & NonCoherent); +} + static u32 amdk8_nodeid(device_t dev) { return (dev->path.pci.devfn >> 3) - 0x18; @@ -87,8 +104,6 @@ static u32 amdk8_nodeid(device_t dev) static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_sblink, u32 max) { - - u32 link_type; int i; u32 busses, config_busses; u32 free_reg, config_reg; @@ -98,18 +113,9 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_ u32 max_devfn; link->cap = 0x80 + (link->link_num * 0x20); - do { - link_type = pci_read_config32(dev, link->cap + 0x18); - } while(link_type & ConnectionPending); - if (!(link_type & LinkConnected)) { - return max; - } - do { - link_type = pci_read_config32(dev, link->cap + 0x18); - } while(!(link_type & InitComplete)); - if (!(link_type & NonCoherent)) { + if (!is_non_coherent_link(dev, link)) return max; - } + /* See if there is an available configuration space mapping * register in function 1. */ -- cgit v1.2.3