From e166782f397f7db2c4446c5e120fa30afbde7bdd Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Sat, 5 May 2012 15:29:32 +0200 Subject: Clean up #ifs Replace #if CONFIG_FOO==1 with #if CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*1[[:space:]]*\$,#if \1," {} + Replace #if (CONFIG_FOO==1) with #if CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*(\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*1)[[:space:]]*\$,#if \1," {} + Replace #if CONFIG_FOO==0 with #if !CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*0[[:space:]]*\$,#if \!\1," {} + Replace #if (CONFIG_FOO==0) with #if !CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*(\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*0)[[:space:]]*\$,#if \!\1," {} + (and some manual changes to fix false positives) Change-Id: Iac6ca7605a5f99885258cf1a9a2473a92de27c42 Signed-off-by: Patrick Georgi Reviewed-on: http://review.coreboot.org/1004 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich Reviewed-by: Martin Roth --- src/northbridge/amd/amdk8/northbridge.c | 42 ++++++++++++++++----------------- 1 file changed, 21 insertions(+), 21 deletions(-) (limited to 'src/northbridge/amd/amdk8/northbridge.c') diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 90b4ebf51d..5eeeda21a4 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -20,7 +20,7 @@ #include #include -#if CONFIG_LOGICAL_CPUS==1 +#if CONFIG_LOGICAL_CPUS #include #endif @@ -256,7 +256,7 @@ static unsigned amdk8_scan_chains(device_t dev, unsigned max) #endif offset_unitid = 0; #if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20)) - #if CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY == 1 + #if CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY if((nodeid == 0) && (sblink == link->link_num)) #endif offset_unitid = 1; @@ -494,7 +494,7 @@ static void amdk8_create_vga_resource(device_t dev, unsigned nodeid) * we only deal with the 'first' vga card */ for (link = dev->link_list; link; link = link->next) { if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) { -#if CONFIG_MULTIPLE_VGA_ADAPTERS == 1 +#if CONFIG_MULTIPLE_VGA_ADAPTERS extern device_t vga_pri; // the primary vga device, defined in device.c printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d link bus range [%d,%d]\n", vga_pri->bus->secondary, link->secondary,link->subordinate); @@ -635,7 +635,7 @@ static void amdk8_domain_read_resources(device_t dev) pci_domain_read_resources(dev); -#if CONFIG_PCI_64BIT_PREF_MEM == 1 +#if CONFIG_PCI_64BIT_PREF_MEM /* Initialize the system wide prefetchable memory resources constraints */ resource = new_resource(dev, 2); resource->limit = 0xfcffffffffULL; @@ -818,11 +818,11 @@ static u32 hoist_memory(unsigned long hole_startk, int node_id) } #endif -#if CONFIG_WRITE_HIGH_TABLES==1 +#if CONFIG_WRITE_HIGH_TABLES #include #endif -#if CONFIG_GFXUMA == 1 +#if CONFIG_GFXUMA extern uint64_t uma_memory_base, uma_memory_size; static void add_uma_resource(struct device *dev, int index) @@ -840,7 +840,7 @@ static void add_uma_resource(struct device *dev, int index) static void amdk8_domain_set_resources(device_t dev) { -#if CONFIG_PCI_64BIT_PREF_MEM == 1 +#if CONFIG_PCI_64BIT_PREF_MEM struct resource *io, *mem1, *mem2; struct resource *res; #endif @@ -857,7 +857,7 @@ static void amdk8_domain_set_resources(device_t dev) io = find_resource(dev, 0); io->base = DEVICE_IO_START; #endif -#if CONFIG_PCI_64BIT_PREF_MEM == 1 +#if CONFIG_PCI_64BIT_PREF_MEM /* Now reallocate the pci resources memory with the * highest addresses I can manage. */ @@ -927,7 +927,7 @@ static void amdk8_domain_set_resources(device_t dev) * if mmio_basek is bigger that hole_basek and will use hole_basek as mmio_basek and we don't need to reset hole. * otherwise We reset the hole to the mmio_basek */ - #if CONFIG_K8_REV_F_SUPPORT == 0 + #if !CONFIG_K8_REV_F_SUPPORT if (!is_cpu_pre_e0()) { #endif @@ -947,7 +947,7 @@ static void amdk8_domain_set_resources(device_t dev) disable_hoist_memory(mem_hole.hole_startk, mem_hole.node_id); } - #if CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC == 1 + #if CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC //We need to double check if the mmio_basek is valid for hole setting, if it is equal to basek, we need to decrease it some u32 basek_pri; for (i = 0; i < fx_devs; i++) { @@ -968,7 +968,7 @@ static void amdk8_domain_set_resources(device_t dev) #endif } -#if CONFIG_K8_REV_F_SUPPORT == 0 +#if !CONFIG_K8_REV_F_SUPPORT } // is_cpu_pre_e0 #endif @@ -997,7 +997,7 @@ static void amdk8_domain_set_resources(device_t dev) } -#if CONFIG_GFXUMA == 1 +#if CONFIG_GFXUMA printk(BIOS_DEBUG, "node %d : uma_memory_base/1024=0x%08llx, mmio_basek=0x%08lx, basek=0x%08x, limitk=0x%08x\n", i, uma_memory_base >> 10, mmio_basek, basek, limitk); if ((uma_memory_base >> 10) < mmio_basek) printk(BIOS_ALERT, "node %d: UMA memory starts below mmio_basek\n", i); @@ -1014,10 +1014,10 @@ static void amdk8_domain_set_resources(device_t dev) ram_resource(dev, (idx | i), basek, pre_sizek); idx += 0x10; sizek -= pre_sizek; -#if CONFIG_WRITE_HIGH_TABLES==1 +#if CONFIG_WRITE_HIGH_TABLES if (high_tables_base==0) { /* Leave some space for ACPI, PIRQ and MP tables */ -#if CONFIG_GFXUMA == 1 +#if CONFIG_GFXUMA high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE; #else high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE; @@ -1030,7 +1030,7 @@ static void amdk8_domain_set_resources(device_t dev) } #if CONFIG_HW_MEM_HOLE_SIZEK != 0 if(reset_memhole) - #if CONFIG_K8_REV_F_SUPPORT == 0 + #if !CONFIG_K8_REV_F_SUPPORT if(!is_cpu_pre_e0() ) #endif sizek += hoist_memory(mmio_basek,i); @@ -1049,7 +1049,7 @@ static void amdk8_domain_set_resources(device_t dev) /* If sizek == 0, it was split at mmio_basek without a hole. * Don't create an empty ram_resource. */ -#if CONFIG_GFXUMA == 1 +#if CONFIG_GFXUMA /* Deduct uma memory before reporting because * this is what the mtrr code expects */ sizek -= uma_memory_size / 1024; @@ -1057,12 +1057,12 @@ static void amdk8_domain_set_resources(device_t dev) if (sizek) ram_resource(dev, (idx | i), basek, sizek); idx += 0x10; -#if CONFIG_WRITE_HIGH_TABLES==1 +#if CONFIG_WRITE_HIGH_TABLES printk(BIOS_DEBUG, "%d: mmio_basek=%08lx, basek=%08x, limitk=%08x\n", i, mmio_basek, basek, limitk); if (high_tables_base==0) { /* Leave some space for ACPI, PIRQ and MP tables */ -#if CONFIG_GFXUMA == 1 +#if CONFIG_GFXUMA high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE; #else high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE; @@ -1072,7 +1072,7 @@ static void amdk8_domain_set_resources(device_t dev) #endif } -#if CONFIG_GFXUMA == 1 +#if CONFIG_GFXUMA add_uma_resource(dev, 7); #endif assign_resources(dev->link_list); @@ -1179,7 +1179,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) sysconf.apicid_offset = bsp_apicid; disable_siblings = !CONFIG_LOGICAL_CPUS; -#if CONFIG_LOGICAL_CPUS == 1 +#if CONFIG_LOGICAL_CPUS get_option(&disable_siblings, "multi_core"); #endif @@ -1248,7 +1248,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) // That is the typical case if(j == 0 ){ - #if CONFIG_K8_REV_F_SUPPORT == 0 + #if !CONFIG_K8_REV_F_SUPPORT e0_later_single_core = is_e0_later_in_bsp(i); // single core #else e0_later_single_core = is_cpu_f0_in_bsp(i); // We can read cpuid(1) from Func3 -- cgit v1.2.3