From 9b4336cf418d22551bea09d93e1cee79281b110e Mon Sep 17 00:00:00 2001 From: Eric Biederman Date: Sat, 19 Jul 2003 04:28:22 +0000 Subject: - Major cleanup of the bootpath - Changes to allow more code to be compiled both ways - Working SMP support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/amd/amdk8/early_ht.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'src/northbridge/amd/amdk8/early_ht.c') diff --git a/src/northbridge/amd/amdk8/early_ht.c b/src/northbridge/amd/amdk8/early_ht.c index b8262d519c..4de8fa1075 100644 --- a/src/northbridge/amd/amdk8/early_ht.c +++ b/src/northbridge/amd/amdk8/early_ht.c @@ -1,11 +1,12 @@ -static void enumerate_ht_chain(void) +static int enumerate_ht_chain(unsigned link) { /* Assumption the HT chain that is bus 0 has the HT I/O Hub on it. * On most boards this just happens. If a cpu has multiple * non Coherent links the appropriate bus registers for the * links needs to be programed to point at bus 0. */ - unsigned next_unitid, last_unitid;; + unsigned next_unitid, last_unitid; + int reset_needed = 0; next_unitid = 1; do { uint32_t id; @@ -46,4 +47,5 @@ static void enumerate_ht_chain(void) pos = pci_read_config8(PCI_DEV(0, 0, 0), pos + PCI_CAP_LIST_NEXT); } } while((last_unitid != next_unitid) && (next_unitid <= 0x1f)); + return reset_needed; } -- cgit v1.2.3