From 9a791dffeae2097aa0a18f645ce07acfed41b9bc Mon Sep 17 00:00:00 2001 From: Yinghai Lu Date: Mon, 3 Apr 2006 20:38:34 +0000 Subject: new cache_as_ram support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/amd/amdk8/coherent_ht.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'src/northbridge/amd/amdk8/coherent_ht.c') diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c index 7d43f3c97d..d29831b74b 100644 --- a/src/northbridge/amd/amdk8/coherent_ht.c +++ b/src/northbridge/amd/amdk8/coherent_ht.c @@ -1,3 +1,10 @@ +#if USE_DCACHE_RAM + +#include "coherent_ht_car.c" + +#else + + /* coherent hypertransport initialization for AMD64 * * written by Stefan Reinauer @@ -1824,3 +1831,5 @@ static int setup_coherent_ht_domain(void) result.needs_reset = optimize_link_read_pointers(result.nodes, result.needs_reset); return result.needs_reset; } + +#endif -- cgit v1.2.3