From 8db0cfefd16c9aa6dbc0ffdfd9d2ba81a1561650 Mon Sep 17 00:00:00 2001
From: Rudolf Marek <r.marek@assembler.cz>
Date: Tue, 3 Feb 2009 22:37:22 +0000
Subject: Following patch converts the run-time SSDT patching via update_ssdt
 funtion to new AML code generator. Compile-tested on all changed targets. I
 think it should work because it works for Asus M2V-MX SE.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3929 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/northbridge/amd/amdk8/amdk8_acpi.c | 83 ----------------------------------
 1 file changed, 83 deletions(-)

(limited to 'src/northbridge/amd/amdk8/amdk8_acpi.c')

diff --git a/src/northbridge/amd/amdk8/amdk8_acpi.c b/src/northbridge/amd/amdk8/amdk8_acpi.c
index 16739c4751..2d56a4f605 100644
--- a/src/northbridge/amd/amdk8/amdk8_acpi.c
+++ b/src/northbridge/amd/amdk8/amdk8_acpi.c
@@ -308,86 +308,3 @@ int k8acpi_write_vars(void)
 	acpigen_patch_len(lens - 1);
 	return lens;
 }
-
-// moved from mb acpi_tables.c
-static void intx_to_stream(u32 val, u32 len, u8 *dest)
-{
-	int i;
-	for(i=0;i<len;i++) {
-		*(dest+i) = (val >> (8*i)) & 0xff;
-	}
-}
-
-static void int_to_stream(u32 val, u8 *dest)
-{
-	return intx_to_stream(val, 4, dest);
-}
-
-// used by acpi_tables.h
-void update_ssdt(void *ssdt)
-{
-	u8 *BUSN;
-	u8 *MMIO;
-	u8 *PCIO;
-	u8 *SBLK;
-	u8 *TOM1;
-	u8 *SBDN;
-	u8 *HCLK;
-	u8 *HCDN;
-	u8 *CBST;
-
-	int i;
-	device_t dev;
-	u32 dword;
-	msr_t msr;
-
-	BUSN = ssdt+0x3a; //+5 will be next BUSN
-	MMIO = ssdt+0x57; //+5 will be next MMIO
-	PCIO = ssdt+0xaf; //+5 will be next PCIO
-	SBLK = ssdt+0xdc; // one byte
-	TOM1 = ssdt+0xe3; //
-	SBDN = ssdt+0xed; //
-	HCLK = ssdt+0xfa; //+5 will be next HCLK
-	HCDN = ssdt+0x12a; //+5 will be next HCDN
-	CBST = ssdt+0x157; //
-
-	dev = dev_find_slot(0, PCI_DEVFN(0x18, 1));
-	for(i=0;i<4;i++) {
-		dword = pci_read_config32(dev, 0xe0+i*4);
-		int_to_stream(dword, BUSN+i*5);
-	}
-	for(i=0;i<0x10;i++) {
-		dword = pci_read_config32(dev, 0x80+i*4);
-		int_to_stream(dword, MMIO+i*5);
-	}
-	for(i=0;i<0x08;i++) {
-		dword = pci_read_config32(dev, 0xc0+i*4);
-		int_to_stream(dword, PCIO+i*5);
-	}
-
-	*SBLK = (u8)(sysconf.sblk);
-
-	msr = rdmsr(TOP_MEM);
-	int_to_stream(msr.lo, TOM1);
-
-	for(i=0;i<sysconf.hc_possible_num;i++) {
-		int_to_stream(sysconf.pci1234[i], HCLK + i*5);
-		int_to_stream(sysconf.hcdn[i],    HCDN + i*5);
-	}
-	for(i=sysconf.hc_possible_num; i<HC_POSSIBLE_NUM; i++) { // in case we set array size to other than 8
-		int_to_stream(0x00000000, HCLK + i*5);
-		int_to_stream(0x20202020, HCDN + i*5);
-	}
-
-	int_to_stream(sysconf.sbdn, SBDN);
-
-	if((sysconf.pci1234[0] >> 12) & 0xff) { //sb chain on  other than bus 0
-		*CBST = (u8) (0x0f);
-	}
-	else {
-		*CBST = (u8) (0x00);
-	}
-
-}
-
-//end
-- 
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