From c3132105bdd35ba174cd0938847ebf292e2eda26 Mon Sep 17 00:00:00 2001 From: Xavi Drudis Ferran Date: Mon, 28 Feb 2011 03:49:28 +0000 Subject: Improving BKDG implementation of P-states, CPU and northbridge frequency and voltage handling for Fam 10 in SVI mode. In fact I changed coreDelay before deleting the code in fidvid that called it. But there're still a couple of calls from src/northbridge/amd/amdmct/wrappers/mcti_d.c Since the comment encouraged fixing something, I parametrized it with the delay time in microseconds and paranoically tried to avoid an overflow at pathological moments. Signed-off-by: Xavi Drudis Ferran Acked-by: Marc Jones git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6408 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/amd/amdht/AsPsDefs.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/northbridge/amd/amdht/AsPsDefs.h') diff --git a/src/northbridge/amd/amdht/AsPsDefs.h b/src/northbridge/amd/amdht/AsPsDefs.h index b961ac5aa7..6f03be886d 100644 --- a/src/northbridge/amd/amdht/AsPsDefs.h +++ b/src/northbridge/amd/amdht/AsPsDefs.h @@ -291,7 +291,10 @@ #define TSC_MSR 0x10 #define CUR_PSTATE_MSR 0xc0010063 +#define TSC_FREQ_SEL_SHIFT 24 +#define TSC_FREQ_SEL_MASK (1 << TSC_FREQ_SEL_SHIFT) + #define WAIT_PSTATE_TIMEOUT 80000000 /* 0.1 s , unit : 1.25 ns */ #endif -- cgit v1.2.3