From c02b4fc9db3c3c1e263027382697b566127f66bb Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Mon, 22 Mar 2010 11:42:32 +0000 Subject: printk_foo -> printk(BIOS_FOO, ...) Signed-off-by: Stefan Reinauer Acked-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/amd/amdfam10/amdfam10.h | 4 +- src/northbridge/amd/amdfam10/amdfam10_acpi.c | 6 +-- src/northbridge/amd/amdfam10/amdfam10_conf.c | 2 +- src/northbridge/amd/amdfam10/debug.c | 50 +++++++++++----------- src/northbridge/amd/amdfam10/get_pci1234.c | 4 +- src/northbridge/amd/amdfam10/misc_control.c | 4 +- src/northbridge/amd/amdfam10/northbridge.c | 52 +++++++++++------------ src/northbridge/amd/amdfam10/raminit_amdmct.c | 2 +- src/northbridge/amd/amdfam10/setup_resource_map.c | 4 +- 9 files changed, 64 insertions(+), 64 deletions(-) (limited to 'src/northbridge/amd/amdfam10') diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h index 826037194d..1fbef83236 100644 --- a/src/northbridge/amd/amdfam10/amdfam10.h +++ b/src/northbridge/amd/amdfam10/amdfam10.h @@ -1134,7 +1134,7 @@ static void wait_all_core0_mem_trained(struct sys_info *sysinfo) #ifdef __PRE_RAM__ print_debug("mem_trained["); print_debug_hex8(i); print_debug("]="); print_debug_hex8(sysinfo->mem_trained[i]); print_debug("\n"); #else - printk_debug("mem_trained[%02x]=%02x\n", i, sysinfo->mem_trained[i]); + printk(BIOS_DEBUG, "mem_trained[%02x]=%02x\n", i, sysinfo->mem_trained[i]); #endif switch(sysinfo->mem_trained[i]) { case 0: //don't need train @@ -1152,7 +1152,7 @@ static void wait_all_core0_mem_trained(struct sys_info *sysinfo) print_debug("mem trained failed\n"); soft_reset(); #else - printk_debug("mem trained failed\n"); + printk(BIOS_DEBUG, "mem trained failed\n"); hard_reset(); #endif } diff --git a/src/northbridge/amd/amdfam10/amdfam10_acpi.c b/src/northbridge/amd/amdfam10/amdfam10_acpi.c index 0d31c2eb02..0a35861556 100644 --- a/src/northbridge/amd/amdfam10/amdfam10_acpi.c +++ b/src/northbridge/amd/amdfam10/amdfam10_acpi.c @@ -60,7 +60,7 @@ unsigned long acpi_create_srat_lapics(unsigned long current) if (!cpu->enabled) { continue; } - printk_debug("SRAT: lapic cpu_index=%02x, node_id=%02x, apic_id=%02x\n", cpu_index, cpu->path.apic.node_id, cpu->path.apic.apic_id); + printk(BIOS_DEBUG, "SRAT: lapic cpu_index=%02x, node_id=%02x, apic_id=%02x\n", cpu_index, cpu->path.apic.node_id, cpu->path.apic.apic_id); current += acpi_create_srat_lapic((acpi_srat_lapic_t *)current, cpu->path.apic.node_id, cpu->path.apic.apic_id); cpu_index++; } @@ -89,7 +89,7 @@ static void set_srat_mem(void *gp, struct device *dev, struct resource *res) basek = resk(res->base); sizek = resk(res->size); - printk_debug("set_srat_mem: dev %s, res->index=%04x startk=%08x, sizek=%08x\n", + printk(BIOS_DEBUG, "set_srat_mem: dev %s, res->index=%04x startk=%08x, sizek=%08x\n", dev_path(dev), res->index, basek, sizek); /* * 0-640K must be on node 0 @@ -338,7 +338,7 @@ unsigned long acpi_add_ssdt_pstates(acpi_rsdp_t *rsdp, unsigned long current) if (!cpu->enabled) { continue; } - printk_debug("ACPI: pstate cpu_index=%02x, node_id=%02x, core_id=%02x\n", cpu_index, cpu->path.apic.node_id, cpu->path.apic.core_id); + printk(BIOS_DEBUG, "ACPI: pstate cpu_index=%02x, node_id=%02x, core_id=%02x\n", cpu_index, cpu->path.apic.node_id, cpu->path.apic.core_id); current = ( current + 0x0f) & -0x10; ssdt = (acpi_header_t *)current; diff --git a/src/northbridge/amd/amdfam10/amdfam10_conf.c b/src/northbridge/amd/amdfam10/amdfam10_conf.c index b52bedad7b..df578044a6 100644 --- a/src/northbridge/amd/amdfam10/amdfam10_conf.c +++ b/src/northbridge/amd/amdfam10/amdfam10_conf.c @@ -779,7 +779,7 @@ static void set_io_addr_reg(device_t dev, u32 nodeid, u32 linkn, u32 reg, #if 0 // FIXME: can we use VGA reg instead? if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) { - printk_spew("%s, enabling legacy VGA IO forwarding for %s link %s\n", + printk(BIOS_SPEW, "%s, enabling legacy VGA IO forwarding for %s link %s\n", __func__, dev_path(dev), link); tempreg |= PCI_IO_BASE_VGA_EN; } diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c index 7fea9a0483..826b83ac0e 100644 --- a/src/northbridge/amd/amdfam10/debug.c +++ b/src/northbridge/amd/amdfam10/debug.c @@ -28,16 +28,16 @@ static void udelay_tsc(u32 us); static void print_debug_addr(const char *str, void *val) { #if CACHE_AS_RAM_ADDRESS_DEBUG == 1 - printk_debug("------Address debug: %s%x------\n", str, val); + printk(BIOS_DEBUG, "------Address debug: %s%x------\n", str, val); #endif } static void print_debug_pci_dev(u32 dev) { #if CONFIG_PCI_BUS_SEGN_BITS==0 - printk_debug("PCI: %02x:%02x.%02x", (dev>>20) & 0xff, (dev>>15) & 0x1f, (dev>>12) & 0x7); + printk(BIOS_DEBUG, "PCI: %02x:%02x.%02x", (dev>>20) & 0xff, (dev>>15) & 0x1f, (dev>>12) & 0x7); #else - printk_debug("PCI: %04x:%02x:%02x.%02x", (dev>>28) & 0x0f, (dev>>20) & 0xff, (dev>>15) & 0x1f, (dev>>12) & 0x7); + printk(BIOS_DEBUG, "PCI: %04x:%02x:%02x.%02x", (dev>>28) & 0x0f, (dev>>20) & 0xff, (dev>>15) & 0x1f, (dev>>12) & 0x7); #endif } @@ -55,7 +55,7 @@ static void print_pci_devices(void) continue; } print_debug_pci_dev(dev); - printk_debug(" %04x:%04x\n", (id & 0xffff), (id>>16)); + printk(BIOS_DEBUG, " %04x:%04x\n", (id & 0xffff), (id>>16)); if(((dev>>12) & 0x07) == 0) { u8 hdr_type; hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE); @@ -80,7 +80,7 @@ static void print_pci_devices_on_bus(u32 busn) continue; } print_debug_pci_dev(dev); - printk_debug(" %04x:%04x\n", (id & 0xffff), (id>>16)); + printk(BIOS_DEBUG, " %04x:%04x\n", (id & 0xffff), (id>>16)); if(((dev>>12) & 0x07) == 0) { u8 hdr_type; hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE); @@ -103,11 +103,11 @@ static void dump_pci_device_range(u32 dev, u32 start_reg, u32 size) for(i = start_reg; i < end; i+=4) { u32 val; if ((i & 0x0f) == 0) { - printk_debug("\n%04x:",i); + printk(BIOS_DEBUG, "\n%04x:",i); } val = pci_read_config32(dev, i); for(j=0;j<4;j++) { - printk_debug(" %02x", val & 0xff); + printk(BIOS_DEBUG, " %02x", val & 0xff); val >>= 8; } } @@ -129,10 +129,10 @@ static void dump_pci_device_index_wait_range(u32 dev, u32 index_reg, u32 start, for(i = start; i < end; i++) { u32 val; int j; - printk_debug("\n%02x:",i); + printk(BIOS_DEBUG, "\n%02x:",i); val = pci_read_config32_index_wait(dev, index_reg, i); for(j=0;j<4;j++) { - printk_debug(" %02x", val & 0xff); + printk(BIOS_DEBUG, " %02x", val & 0xff); val >>= 8; } @@ -160,10 +160,10 @@ static void dump_pci_device_index(u32 dev, u32 index_reg, u32 type, u32 length) for(i = 0; i < length; i++) { u32 val; if ((i & 0x0f) == 0) { - printk_debug("\n%02x:",i); + printk(BIOS_DEBUG, "\n%02x:",i); } val = pci_read_config32_index(dev, index_reg, i|type); - printk_debug(" %08x", val); + printk(BIOS_DEBUG, " %08x", val); } print_debug("\n"); } @@ -231,38 +231,38 @@ static void dump_spd_registers(const struct mem_controller *ctrl) device = ctrl->spd_addr[i]; if (device) { int j; - printk_debug("dimm: %02x.0: %02x", i, device); + printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device); for(j = 0; j < 128; j++) { int status; u8 byte; if ((j & 0xf) == 0) { - printk_debug("\n%02x: ", j); + printk(BIOS_DEBUG, "\n%02x: ", j); } status = smbus_read_byte(device, j); if (status < 0) { break; } byte = status & 0xff; - printk_debug("%02x ", byte); + printk(BIOS_DEBUG, "%02x ", byte); } print_debug("\n"); } device = ctrl->spd_addr[i+DIMM_SOCKETS]; if (device) { int j; - printk_debug("dimm: %02x.1: %02x", i, device); + printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device); for(j = 0; j < 128; j++) { int status; u8 byte; if ((j & 0xf) == 0) { - printk_debug("\n%02x: ", j); + printk(BIOS_DEBUG, "\n%02x: ", j); } status = smbus_read_byte(device, j); if (status < 0) { break; } byte = status & 0xff; - printk_debug("%02x ", byte); + printk(BIOS_DEBUG, "%02x ", byte); } print_debug("\n"); } @@ -275,7 +275,7 @@ static void dump_smbus_registers(void) for(device = 1; device < 0x80; device++) { int j; if( smbus_read_byte(device, 0) < 0 ) continue; - printk_debug("smbus: %02x", device); + printk(BIOS_DEBUG, "smbus: %02x", device); for(j = 0; j < 256; j++) { int status; u8 byte; @@ -284,10 +284,10 @@ static void dump_smbus_registers(void) break; } if ((j & 0xf) == 0) { - printk_debug("\n%02x: ",j); + printk(BIOS_DEBUG, "\n%02x: ",j); } byte = status & 0xff; - printk_debug("%02x ", byte); + printk(BIOS_DEBUG, "%02x ", byte); } print_debug("\n"); } @@ -298,14 +298,14 @@ static void dump_io_resources(u32 port) int i; udelay_tsc(2000); - printk_debug("%04x:\n", port); + printk(BIOS_DEBUG, "%04x:\n", port); for(i=0;i<256;i++) { u8 val; if ((i & 0x0f) == 0) { - printk_debug("%02x:", i); + printk(BIOS_DEBUG, "%02x:", i); } val = inb(port); - printk_debug(" %02x",val); + printk(BIOS_DEBUG, " %02x",val); if ((i & 0x0f) == 0x0f) { print_debug("\n"); } @@ -319,9 +319,9 @@ static void dump_mem(u32 start, u32 end) print_debug("dump_mem:"); for(i=start;ilinks; link++) { if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) { #if CONFIG_CONSOLE_VGA_MULTI == 1 - printk_debug("VGA: vga_pri bus num = %d dev->link[link] bus range [%d,%d]\n", vga_pri->bus->secondary, + printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d dev->link[link] bus range [%d,%d]\n", vga_pri->bus->secondary, dev->link[link].secondary,dev->link[link].subordinate); /* We need to make sure the vga_pri is under the link */ if((vga_pri->bus->secondary >= dev->link[link].secondary ) && @@ -583,7 +583,7 @@ static void amdfam10_create_vga_resource(device_t dev, unsigned nodeid) if (link == dev->links) return; - printk_debug("VGA: %s (aka node %d) link %d has VGA device\n", dev_path(dev), nodeid, link); + printk(BIOS_DEBUG, "VGA: %s (aka node %d) link %d has VGA device\n", dev_path(dev), nodeid, link); set_vga_enable_reg(nodeid, link); } @@ -906,9 +906,9 @@ static void pci_domain_set_resources(device_t dev) mem1 = find_resource(dev, 1|(link<<2)); mem2 = find_resource(dev, 2|(link<<2)); - printk_debug("base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", + printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", mem1->base, mem1->limit, mem1->size, mem1->align); - printk_debug("base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", + printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", mem2->base, mem2->limit, mem2->size, mem2->align); /* See if both resources have roughly the same limits */ @@ -934,9 +934,9 @@ static void pci_domain_set_resources(device_t dev) mem1->base = resource_max(mem1); } - printk_debug("base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", + printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", mem1->base, mem1->limit, mem1->size, mem1->align); - printk_debug("base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", + printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", mem2->base, mem2->limit, mem2->size, mem2->align); } @@ -1041,7 +1041,7 @@ static void pci_domain_set_resources(device_t dev) } -// printk_debug("node %d : mmio_basek=%08x, basek=%08x, limitk=%08x\n", i, mmio_basek, basek, limitk); +// printk(BIOS_DEBUG, "node %d : mmio_basek=%08x, basek=%08x, limitk=%08x\n", i, mmio_basek, basek, limitk); /* split the region to accomodate pci memory space */ if ( (basek < 4*1024*1024 ) && (limitk > mmio_basek) ) { @@ -1057,7 +1057,7 @@ static void pci_domain_set_resources(device_t dev) /* Leave some space for ACPI, PIRQ and MP tables */ high_tables_base = (mmio_basek - HIGH_TABLES_SIZE) * 1024; high_tables_size = HIGH_TABLES_SIZE * 1024; - printk_debug("(split)%xK table at =%08llx\n", HIGH_TABLES_SIZE, + printk(BIOS_DEBUG, "(split)%xK table at =%08llx\n", HIGH_TABLES_SIZE, high_tables_base); } #endif @@ -1086,7 +1086,7 @@ static void pci_domain_set_resources(device_t dev) ram_resource(dev, (idx | i), basek, sizek); idx += 0x10; #if CONFIG_WRITE_HIGH_TABLES==1 - printk_debug("%d: mmio_basek=%08lx, basek=%08x, limitk=%08x\n", + printk(BIOS_DEBUG, "%d: mmio_basek=%08lx, basek=%08x, limitk=%08x\n", i, mmio_basek, basek, limitk); if (i==0 && high_tables_base==0) { /* Leave some space for ACPI, PIRQ and MP tables */ @@ -1144,7 +1144,7 @@ static u32 amdfam10_domain_scan_bus(device_t dev, u32 max) if (!dev->link[0].disable_relaxed_ordering) { httc |= HTTC_RSP_PASS_PW; } - printk_spew("%s passpw: %s\n", + printk(BIOS_SPEW, "%s passpw: %s\n", dev_path(dev), (!dev->link[0].disable_relaxed_ordering)? "enabled":"disabled"); @@ -1247,34 +1247,34 @@ static u32 cpu_bus_scan(device_t dev, u32 max) #if CONFIG_CBB dev_mc = dev_find_slot(0, PCI_DEVFN(CONFIG_CDB, 0)); //0x00 if(dev_mc && dev_mc->bus) { - printk_debug("%s found", dev_path(dev_mc)); + printk(BIOS_DEBUG, "%s found", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; if(pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { - printk_debug("\n%s move to ",dev_path(dev_mc)); + printk(BIOS_DEBUG, "\n%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff - printk_debug("%s",dev_path(dev_mc)); + printk(BIOS_DEBUG, "%s",dev_path(dev_mc)); } else { - printk_debug(" but it is not under pci_domain directly "); + printk(BIOS_DEBUG, " but it is not under pci_domain directly "); } - printk_debug("\n"); + printk(BIOS_DEBUG, "\n"); } dev_mc = dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB, 0)); if(!dev_mc) { dev_mc = dev_find_slot(0, PCI_DEVFN(0x18, 0)); if (dev_mc && dev_mc->bus) { - printk_debug("%s found\n", dev_path(dev_mc)); + printk(BIOS_DEBUG, "%s found\n", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; if(pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { if((pci_domain->links==1) && (pci_domain->link[0].children == dev_mc)) { - printk_debug("%s move to ",dev_path(dev_mc)); + printk(BIOS_DEBUG, "%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff - printk_debug("%s\n",dev_path(dev_mc)); + printk(BIOS_DEBUG, "%s\n",dev_path(dev_mc)); while(dev_mc){ - printk_debug("%s move to ",dev_path(dev_mc)); + printk(BIOS_DEBUG, "%s move to ",dev_path(dev_mc)); dev_mc->path.pci.devfn -= PCI_DEVFN(0x18,0); - printk_debug("%s\n",dev_path(dev_mc)); + printk(BIOS_DEBUG, "%s\n",dev_path(dev_mc)); dev_mc = dev_mc->sibling; } } @@ -1286,7 +1286,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) dev_mc = dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB, 0)); if (!dev_mc) { - printk_err("%02x:%02x.0 not found", CONFIG_CBB, CONFIG_CDB); + printk(BIOS_ERR, "%02x:%02x.0 not found", CONFIG_CBB, CONFIG_CDB); die(""); } @@ -1301,7 +1301,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) pci_domain->link[1].link = 1; pci_domain->link[1].dev = pci_domain; pci_domain->link[1].children = 0; - printk_debug("%s links increase to %d\n", dev_path(pci_domain), pci_domain->links); + printk(BIOS_DEBUG, "%s links increase to %d\n", dev_path(pci_domain), pci_domain->links); } pci_domain->link[1].secondary = CONFIG_CBB - 1; } @@ -1355,7 +1355,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) dev->link[j].dev = dev; } dev->links = linknum; - printk_debug("%s links increase to %d\n", dev_path(dev), dev->links); + printk(BIOS_DEBUG, "%s links increase to %d\n", dev_path(dev), dev->links); } } @@ -1366,7 +1366,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) cores_found = (j >> 12) & 3; // dev is func 3 if (siblings > 3) cores_found |= (j >> 13) & 4; - printk_debug(" %s siblings=%d\n", dev_path(dev), cores_found); + printk(BIOS_DEBUG, " %s siblings=%d\n", dev_path(dev), cores_found); } u32 jj; @@ -1416,7 +1416,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) } } #endif - printk_debug("CPU: %s %s\n", + printk(BIOS_DEBUG, "CPU: %s %s\n", dev_path(cpu), cpu->enabled?"enabled":"disabled"); } diff --git a/src/northbridge/amd/amdfam10/raminit_amdmct.c b/src/northbridge/amd/amdfam10/raminit_amdmct.c index 21f1e188e5..4b33fd6f86 100644 --- a/src/northbridge/amd/amdfam10/raminit_amdmct.c +++ b/src/northbridge/amd/amdfam10/raminit_amdmct.c @@ -20,7 +20,7 @@ static void print_raminit(const char *strval, u32 val) { - printk_debug("%s%08x\n", strval, val); + printk(BIOS_DEBUG, "%s%08x\n", strval, val); } static void print_tx(const char *strval, u32 val) diff --git a/src/northbridge/amd/amdfam10/setup_resource_map.c b/src/northbridge/amd/amdfam10/setup_resource_map.c index b91c9222c1..0d6d743750 100644 --- a/src/northbridge/amd/amdfam10/setup_resource_map.c +++ b/src/northbridge/amd/amdfam10/setup_resource_map.c @@ -81,7 +81,7 @@ static void setup_resource_map_x_offset(const u32 *register_values, u32 max, #endif for(i = 0; i < max; i += 4) { #if RES_DEBUG - printk_debug("%04x: %02x %08x <- & %08x | %08x\n", + printk(BIOS_DEBUG, "%04x: %02x %08x <- & %08x | %08x\n", i/4, register_values[i], register_values[i+1] + ( (register_values[i]==RES_PCI_IO) ? offset_pci_dev : 0), register_values[i+2], @@ -146,7 +146,7 @@ static void setup_resource_map_x(const u32 *register_values, u32 max) #endif for(i = 0; i < max; i += 4) { #if RES_DEBUG - printk_debug("%04x: %02x %08x <- & %08x | %08x\n", + printk(BIOS_DEBUG, "%04x: %02x %08x <- & %08x | %08x\n", i/4, register_values[i],register_values[i+1], register_values[i+2], register_values[i+3]); #endif switch (register_values[i]) { -- cgit v1.2.3