From 77a58b92e8d44d17b9aa06710ed728a697722b4a Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sat, 24 Jun 2017 14:45:48 -0600 Subject: nb/amd: add IS_ENABLED() around Kconfig symbol references MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some of these can be changed from #if to if(), but that will happen in a follow-on commmit. Change-Id: I763cbbc31dcd4cdd128c04793a742ab6daaf5f0c Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/20345 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer Reviewed-by: Kyösti Mälkki --- src/northbridge/amd/amdfam10/northbridge.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) (limited to 'src/northbridge/amd/amdfam10/northbridge.c') diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index dccd9c6c6f..8da05ed054 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -36,7 +36,7 @@ #include #include -#if CONFIG_LOGICAL_CPUS +#if IS_ENABLED(CONFIG_LOGICAL_CPUS) #include #include #endif @@ -50,7 +50,7 @@ #include #endif -#if CONFIG_AMD_SB_CIMX +#if IS_ENABLED(CONFIG_AMD_SB_CIMX) #include #endif @@ -320,7 +320,7 @@ static void amdfam10_scan_chains(device_t dev) { struct bus *link; -#if CONFIG_CPU_AMD_SOCKET_G34_NON_AGESA +#if IS_ENABLED(CONFIG_CPU_AMD_SOCKET_G34_NON_AGESA) if (is_fam15h()) { uint8_t current_link_number = 0; @@ -585,7 +585,7 @@ static void amdfam10_create_vga_resource(device_t dev, unsigned nodeid) * we only deal with the 'first' vga card */ for (link = dev->link_list; link; link = link->next) { if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) { -#if CONFIG_MULTIPLE_VGA_ADAPTERS +#if IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS) extern device_t vga_pri; // the primary vga device, defined in device.c printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary, link->secondary,link->subordinate); @@ -890,7 +890,7 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void) static void setup_uma_memory(void) { -#if CONFIG_GFXUMA +#if IS_ENABLED(CONFIG_GFXUMA) uint32_t topmem = (uint32_t) bsp_topmem(); uma_memory_size = get_uma_memory_size(topmem); uma_memory_base = topmem - uma_memory_size; /* TOP_MEM1 */ @@ -989,7 +989,7 @@ static void amdfam10_domain_set_resources(device_t dev) i, mmio_basek, basek, limitk); } -#if CONFIG_GFXUMA +#if IS_ENABLED(CONFIG_GFXUMA) uma_resource(dev, 7, uma_memory_base >> 10, uma_memory_size >> 10); #endif @@ -1330,7 +1330,7 @@ static struct device_operations pci_domain_ops = { #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) .acpi_name = amdfam10_domain_acpi_name, #endif -#if CONFIG_GENERATE_SMBIOS_TABLES +#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES) .get_smbios_data = amdfam10_get_smbios_data, #endif }; @@ -1359,7 +1359,7 @@ static void sysconf_init(device_t dev) // first node sysconf.bsp_apicid = lapicid(); sysconf.apicid_offset = sysconf.bsp_apicid; -#if CONFIG_ENABLE_APIC_EXT_ID +#if IS_ENABLED(CONFIG_ENABLE_APIC_EXT_ID) if (pci_read_config32(dev, 0x68) & (HTTC_APIC_EXT_ID|HTTC_APIC_EXT_BRD_CST)) { sysconf.enabled_apic_ext_id = 1; @@ -1454,7 +1454,7 @@ static void cpu_bus_scan(device_t dev) } disable_siblings = !CONFIG_LOGICAL_CPUS; -#if CONFIG_LOGICAL_CPUS +#if IS_ENABLED(CONFIG_LOGICAL_CPUS) get_option(&disable_siblings, "multi_core"); #endif @@ -1659,7 +1659,7 @@ static void cpu_bus_scan(device_t dev) } } -#if CONFIG_ENABLE_APIC_EXT_ID && (CONFIG_APIC_ID_OFFSET > 0) +#if IS_ENABLED(CONFIG_ENABLE_APIC_EXT_ID) && (CONFIG_APIC_ID_OFFSET > 0) if (sysconf.enabled_apic_ext_id) { if (apic_id != 0 || sysconf.lift_bsp_apicid) { apic_id += sysconf.apicid_offset; @@ -1948,7 +1948,7 @@ static void cpu_bus_init(device_t dev) detect_and_enable_probe_filter(dev); detect_and_enable_cache_partitioning(dev); initialize_cpus(dev->link_list); -#if CONFIG_AMD_SB_CIMX +#if IS_ENABLED(CONFIG_AMD_SB_CIMX) sb_After_Pci_Init(); sb_Mid_Post_Init(); #endif -- cgit v1.2.3