From 04f8fd981fd49e9929fea2b27991e78673fc57a3 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Mon, 19 Sep 2016 10:24:34 -0600 Subject: northbridge/amd/amdfam10: Improve code formatting Change-Id: I86a252598666af635281eaa467020acb53d71c77 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/16642 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/northbridge/amd/amdfam10/debug.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'src/northbridge/amd/amdfam10/debug.c') diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c index e01c44deea..327a0e68e3 100644 --- a/src/northbridge/amd/amdfam10/debug.c +++ b/src/northbridge/amd/amdfam10/debug.c @@ -95,7 +95,7 @@ static void dump_pci_device_range(u32 dev, u32 start_reg, u32 size) printk(BIOS_DEBUG, "\n%04x:",i); } val = pci_read_config32(dev, i); - for (j=0;j<4;j++) { + for (j = 0; j < 4; j++) { printk(BIOS_DEBUG, " %02x", val & 0xff); val >>= 8; } @@ -121,7 +121,7 @@ static void dump_pci_device_index_wait_range(u32 dev, u32 index_reg, u32 start, int j; printk(BIOS_DEBUG, "\n%02x:",i); val = pci_read_config32_index_wait(dev, index_reg, i); - for (j=0;j<4;j++) { + for (j = 0; j < 4; j++) { printk(BIOS_DEBUG, " %02x", val & 0xff); val >>= 8; } @@ -262,7 +262,7 @@ static void dump_smbus_registers(void) printk(BIOS_DEBUG, "\n"); for (device = 1; device < 0x80; device++) { int j; - if ( smbus_read_byte(device, 0) < 0 ) continue; + if (smbus_read_byte(device, 0) < 0) continue; printk(BIOS_DEBUG, "smbus: %02x", device); for (j = 0; j < 256; j++) { int status; @@ -287,7 +287,7 @@ static inline void dump_io_resources(u32 port) int i; udelay(2000); printk(BIOS_DEBUG, "%04x:\n", port); - for (i=0;i<256;i++) { + for (i = 0; i < 256; i++) { u8 val; if ((i & 0x0f) == 0) { printk(BIOS_DEBUG, "%02x:", i); @@ -305,8 +305,8 @@ static inline void dump_mem(u32 start, u32 end) { u32 i; printk(BIOS_DEBUG, "dump_mem:"); - for (i=start;i