From b752e4f402b2a96d1b9545b5fed3df09d2990743 Mon Sep 17 00:00:00 2001 From: Vladimir Serbinenko Date: Fri, 3 Oct 2014 09:39:31 +0200 Subject: acpi_add_ssdt_pstates: Remove function. Nowhere in database p_state_num is set. So this whole function ends up being a noop. Moreover the offsets used by it are wrong with any optimizing iasl. Remove it in preparation of move to per-device ACPI. Change-Id: I1f1f9743565aa8f0b8fca472ad4cb6d7542fcecb Signed-off-by: Vladimir Serbinenko Reviewed-on: http://review.coreboot.org/7012 Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- src/northbridge/amd/amdfam10/acpi.c | 87 ------------------------------------- 1 file changed, 87 deletions(-) (limited to 'src/northbridge/amd/amdfam10/acpi.c') diff --git a/src/northbridge/amd/amdfam10/acpi.c b/src/northbridge/amd/amdfam10/acpi.c index abba0ce817..513fa58f7e 100644 --- a/src/northbridge/amd/amdfam10/acpi.c +++ b/src/northbridge/amd/amdfam10/acpi.c @@ -290,90 +290,3 @@ void update_ssdtx(void *ssdtx, int i) } -static void update_sspr(void *sspr, u32 nodeid, u32 cpuindex) -{ - u8 *CPU; - u8 *CPUIN; - u8 *COREFREQ; - u8 *POWER; - u8 *TRANSITION_LAT; - u8 *BUSMASTER_LAT; - u8 *CONTROL; - u8 *STATUS; - unsigned offset = 0x94 - 0x7f; - int i; - - CPU = sspr + 0x38; - CPUIN = sspr + 0x3a; - - COREFREQ = sspr + 0x7f; //2 byte - POWER = sspr + 0x82; //3 bytes - TRANSITION_LAT = sspr + 0x87; //two bytes - BUSMASTER_LAT = sspr + 0x8a; //two bytes - CONTROL = sspr + 0x8d; - STATUS = sspr + 0x8f; - - snprintf((char*)CPU, 3, "%02x", (char)cpuindex); - *CPUIN = (u8) cpuindex; - - for(i=0;icorefreq, 2, COREFREQ + i*offset); - intx_to_stream(p_state->power, 3, POWER + i*offset); - intx_to_stream(p_state->transition_lat, 2, TRANSITION_LAT + i*offset); - intx_to_stream(p_state->busmaster_lat, 2, BUSMASTER_LAT + i*offset); - *((u8 *)(CONTROL + i*offset)) =(u8) p_state->control; - *((u8 *)(STATUS + i*offset)) =(u8) p_state->status; - } -} - -extern const unsigned char AmlCode_sspr5[]; -extern const unsigned char AmlCode_sspr4[]; -extern const unsigned char AmlCode_sspr3[]; -extern const unsigned char AmlCode_sspr2[]; -extern const unsigned char AmlCode_sspr1[]; - -/* fixme: find one good way for different p_state_num */ -unsigned long acpi_add_ssdt_pstates(acpi_rsdp_t *rsdp, unsigned long current) -{ - device_t cpu; - int cpu_index = 0; - - acpi_header_t *ssdt; - - if(!sysconf.p_state_num) return current; - - void *AmlCode_sspr; - switch(sysconf.p_state_num) { - case 1: AmlCode_sspr = &AmlCode_sspr1; break; - case 2: AmlCode_sspr = &AmlCode_sspr2; break; - case 3: AmlCode_sspr = &AmlCode_sspr3; break; - case 4: AmlCode_sspr = &AmlCode_sspr4; break; - default: AmlCode_sspr = &AmlCode_sspr5; break; - } - - for(cpu = all_devices; cpu; cpu = cpu->next) { - if ((cpu->path.type != DEVICE_PATH_APIC) || - (cpu->bus->dev->path.type != DEVICE_PATH_CPU_CLUSTER)) { - continue; - } - if (!cpu->enabled) { - continue; - } - printk(BIOS_DEBUG, "ACPI: pstate cpu_index=%02x, node_id=%02x, core_id=%02x\n", cpu_index, cpu->path.apic.node_id, cpu->path.apic.core_id); - - current = ALIGN(current, 16); - ssdt = (acpi_header_t *)current; - memcpy(ssdt, AmlCode_sspr, sizeof(acpi_header_t)); - current += ssdt->length; - memcpy(ssdt, AmlCode_sspr, ssdt->length); - update_sspr((void*)ssdt,cpu->path.apic.node_id, cpu_index); - /* recalculate checksum */ - ssdt->checksum = 0; - ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length); - acpi_add_table(rsdp, ssdt); - - cpu_index++; - } - return current; -} -- cgit v1.2.3