From 2a83935d9f50e3059e7747338a700c2fceb1731a Mon Sep 17 00:00:00 2001 From: Timothy Pearson Date: Sat, 5 Sep 2015 18:56:05 -0500 Subject: northbridge/amd/amdfam10: Set DIMM voltage based on SPD data Change-Id: I67a76cf0e4ebc33fbd7dd151bb68dce1fc6ba680 Signed-off-by: Timothy Pearson Reviewed-on: http://review.coreboot.org/11957 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/northbridge/amd/amdfam10/acpi.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/northbridge/amd/amdfam10/acpi.c') diff --git a/src/northbridge/amd/amdfam10/acpi.c b/src/northbridge/amd/amdfam10/acpi.c index 5ff38aab49..ad54abd765 100644 --- a/src/northbridge/amd/amdfam10/acpi.c +++ b/src/northbridge/amd/amdfam10/acpi.c @@ -303,8 +303,7 @@ void northbridge_acpi_write_vars(device_t device) } else { if((sysconf.pci1234[0] >> 12) & 0xff) { //sb chain on other than bus 0 CBST = (u8) (0x0f); - } - else { + } else { CBST = (u8) (0x00); } } -- cgit v1.2.3