From da74041b2b3be61737e598a45bd53e773faabfa2 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sun, 5 Mar 2017 18:57:03 +0200 Subject: AGESA: Move heap allocator declarations MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Definitions are not part of ACPI S3 feature, nor do they require any AGESA headers so move them to a better location. Change-Id: I9269e9d65463463d9b8280936cf90ef76711ed4f Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/18616 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Marc Jones --- src/northbridge/amd/agesa/agesa_helper.h | 19 +++++++++++++++++++ src/northbridge/amd/agesa/oem_s3.c | 1 + 2 files changed, 20 insertions(+) (limited to 'src/northbridge/amd/agesa') diff --git a/src/northbridge/amd/agesa/agesa_helper.h b/src/northbridge/amd/agesa/agesa_helper.h index 73f927e576..82963c1f04 100644 --- a/src/northbridge/amd/agesa/agesa_helper.h +++ b/src/northbridge/amd/agesa/agesa_helper.h @@ -16,6 +16,8 @@ #ifndef _AGESA_HELPER_H_ #define _AGESA_HELPER_H_ +#include + enum { PICK_DMI, /* DMI Interface */ PICK_PSTATE, /* Acpi Pstate SSDT Table */ @@ -33,4 +35,21 @@ void amd_initcpuio(void); void amd_initmmio(void); void amd_initenv(void); +void *GetHeapBase(void); +void EmptyHeap(void); +void ResumeHeap(void **heap, size_t *len); + +#define BSP_STACK_BASE_ADDR 0x30000 + +#if 1 +/* This covers node 0 only. */ +#define HIGH_ROMSTAGE_STACK_SIZE (0x48000 - BSP_STACK_BASE_ADDR) +#else +/* This covers total of 8 nodes. */ +#define HIGH_ROMSTAGE_STACK_SIZE (0xA0000 - BSP_STACK_BASE_ADDR) +#endif + +#define HIGH_MEMORY_SCRATCH 0x30000 + + #endif /* _AGESA_HELPER_H_ */ diff --git a/src/northbridge/amd/agesa/oem_s3.c b/src/northbridge/amd/agesa/oem_s3.c index c7d23ff346..a9504acb05 100644 --- a/src/northbridge/amd/agesa/oem_s3.c +++ b/src/northbridge/amd/agesa/oem_s3.c @@ -21,6 +21,7 @@ #include #include #include +#include typedef enum { S3DataTypeNonVolatile = 0, ///< NonVolatile Data Type -- cgit v1.2.3