From 4ee82c69a2ecfe1afc9a357fc7ddbaa06c10d2b5 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Tue, 25 Nov 2014 16:03:12 +0200 Subject: AGESA fam16kb: Move clearing of NoSnoopEnable bit MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Originally from commit 4ca72139 move this code now from cpu/ to northbridge/. Change-Id: I38517cff273dd8f78bf5eda1d48fd1cd820ced88 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/7603 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan --- src/northbridge/amd/agesa/family16kb/northbridge.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'src/northbridge/amd/agesa') diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index 72967c129c..def29d1f87 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -653,9 +653,25 @@ static const struct pci_driver family10_northbridge __pci_driver = { .device = PCI_DEVICE_ID_AMD_10H_NB_HT, }; +static void fam16_finalize(void *chip_info) +{ + device_t dev; + u32 value; + dev = dev_find_slot(0, PCI_DEVFN(0, 0)); /* clear IoapicSbFeatureEn */ + pci_write_config32(dev, 0xF8, 0); + pci_write_config32(dev, 0xFC, 5); /* TODO: move it to dsdt.asl */ + + /* disable No Snoop */ + dev = dev_find_slot(0, PCI_DEVFN(1, 1)); + value = pci_read_config32(dev, 0x60); + value &= ~(1 << 11); + pci_write_config32(dev, 0x60, value); +} + struct chip_operations northbridge_amd_agesa_family16kb_ops = { CHIP_NAME("AMD FAM16 Northbridge") .enable_dev = 0, + .final = fam16_finalize, }; static void domain_read_resources(device_t dev) -- cgit v1.2.3