From 1e6a227f1001825f3a948b0734fe60dc0313a88c Mon Sep 17 00:00:00 2001 From: Mike Banon Date: Sat, 21 Nov 2020 21:58:50 +0300 Subject: nb/amd/agesa/family15tn: define macros for GNB and IOMMU devices Follow the example of newer AMD code for Stoneyridge and Picasso. Signed-off-by: Mike Banon Change-Id: I9c17d4cb4953b28a47483f5d7db308ccc89e9281 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47848 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held Reviewed-by: Angel Pons --- src/northbridge/amd/agesa/family15tn/pci_devs.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'src/northbridge/amd/agesa') diff --git a/src/northbridge/amd/agesa/family15tn/pci_devs.h b/src/northbridge/amd/agesa/family15tn/pci_devs.h index 22ce8f5e95..56138433e3 100644 --- a/src/northbridge/amd/agesa/family15tn/pci_devs.h +++ b/src/northbridge/amd/agesa/family15tn/pci_devs.h @@ -7,6 +7,16 @@ #define BUS0 0 +/* GNB Root Complex */ +#define GNB_DEV 0x0 +#define GNB_FUNC 0 +#define GNB_DEVFN PCI_DEVFN(GNB_DEV, GNB_FUNC) + +/* IOMMU */ +#define IOMMU_DEV 0x0 +#define IOMMU_FUNC 2 +#define IOMMU_DEVFN PCI_DEVFN(IOMMU_DEV, IOMMU_FUNC) + /* Graphics and Display */ #define GFX_DEV 0x1 #define GFX_FUNC 0 -- cgit v1.2.3