From 4ad7f5b1a4f81343cee634a3a49145a3ed9855b7 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Tue, 22 May 2018 01:15:17 +0300 Subject: AGESA: Use pcidev_on_root() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We have constant CONFIG_CBB==0, replace ill dev_find_slot() with safe pcidev_on_root(); Change-Id: Ieb2030fa3d77a9f49fc5faf12b92b5f00f49d354 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/26482 Reviewed-by: Arthur Heymans Tested-by: build bot (Jenkins) --- src/northbridge/amd/agesa/family14/dimmSpd.c | 2 +- src/northbridge/amd/agesa/family14/northbridge.c | 7 ++++--- src/northbridge/amd/agesa/family14/state_machine.c | 2 +- 3 files changed, 6 insertions(+), 5 deletions(-) (limited to 'src/northbridge/amd/agesa/family14') diff --git a/src/northbridge/amd/agesa/family14/dimmSpd.c b/src/northbridge/amd/agesa/family14/dimmSpd.c index 25771d1d2d..98776505ba 100644 --- a/src/northbridge/amd/agesa/family14/dimmSpd.c +++ b/src/northbridge/amd/agesa/family14/dimmSpd.c @@ -33,7 +33,7 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINTN unused2, AGESA_READ_SPD_PAR { UINT8 spdAddress; - DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); + DEVTREE_CONST struct device *dev = pcidev_on_root(0x18, 2); if (dev == NULL) return AGESA_ERROR; diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index b843c799c2..adf7878859 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -43,7 +43,7 @@ static unsigned fx_devs = 0; static struct device *get_node_pci(u32 nodeid, u32 fn) { - return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn)); + return pcidev_on_root(CONFIG_CDB + nodeid, fn); } static void get_fx_devs(void) @@ -590,11 +590,12 @@ static void cpu_bus_scan(struct device *dev) int apic_id, cores_found; /* There is only one node for fam14, but there may be multiple cores. */ - cpu = dev_find_slot(0, PCI_DEVFN(0x18, 0)); + cpu = pcidev_on_root(0x18, 0); if (!cpu) printk(BIOS_ERR, "ERROR: %02x:%02x.0 not found", 0, 0x18); - cores_found = (pci_read_config32(dev_find_slot(0,PCI_DEVFN(0x18,0x3)), 0xe8) >> 12) & 3; + cores_found = (pci_read_config32(pcidev_on_root(0x18, 0x3), + 0xe8) >> 12) & 3; printk(BIOS_DEBUG, " AP siblings=%d\n", cores_found); for (apic_id = 0; apic_id <= cores_found; apic_id++) { diff --git a/src/northbridge/amd/agesa/family14/state_machine.c b/src/northbridge/amd/agesa/family14/state_machine.c index 89aca7d720..8db6095dec 100644 --- a/src/northbridge/amd/agesa/family14/state_machine.c +++ b/src/northbridge/amd/agesa/family14/state_machine.c @@ -40,7 +40,7 @@ void platform_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset) #ifdef __SIMPLE_DEVICE__ pci_devfn_t dev = PCI_DEV(0, 0x18, 2); #else - struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); + struct device *dev = pcidev_on_root(0x18, 2); #endif if (boot_cpu()) { u32 mct_cfg_lo = pci_read_config32(dev, 0x118); -- cgit v1.2.3